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Clear HandleMap and ReplaceMap after instruction selection. Or it may cause
non-deterministic behavior. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28454 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -161,6 +161,8 @@ void ARMDAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &DAG) {
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DAG.setRoot(SelectRoot(DAG.getRoot()));
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CodeGenMap.clear();
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HandleMap.clear();
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ReplaceMap.clear();
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DAG.RemoveDeadNodes();
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ScheduleAndEmitDAG(DAG);
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@ -155,6 +155,8 @@ void AlphaDAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &DAG) {
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// Select target instructions for the DAG.
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DAG.setRoot(SelectRoot(DAG.getRoot()));
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CodeGenMap.clear();
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HandleMap.clear();
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ReplaceMap.clear();
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DAG.RemoveDeadNodes();
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// Emit machine code to BB.
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@ -148,6 +148,8 @@ void IA64DAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &DAG) {
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// Select target instructions for the DAG.
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DAG.setRoot(SelectRoot(DAG.getRoot()));
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CodeGenMap.clear();
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HandleMap.clear();
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ReplaceMap.clear();
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DAG.RemoveDeadNodes();
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// Emit machine code to BB.
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@ -206,6 +206,8 @@ void PPCDAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &DAG) {
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// Select target instructions for the DAG.
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DAG.setRoot(SelectRoot(DAG.getRoot()));
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CodeGenMap.clear();
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HandleMap.clear();
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ReplaceMap.clear();
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DAG.RemoveDeadNodes();
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// Emit machine code to BB.
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@ -996,6 +996,8 @@ void SparcDAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &DAG) {
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// Select target instructions for the DAG.
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DAG.setRoot(SelectRoot(DAG.getRoot()));
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CodeGenMap.clear();
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HandleMap.clear();
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ReplaceMap.clear();
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DAG.RemoveDeadNodes();
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// Emit machine code to BB.
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@ -186,6 +186,8 @@ void X86DAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &DAG) {
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DEBUG(std::cerr << "===== Instruction selection ends:\n");
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#endif
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CodeGenMap.clear();
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HandleMap.clear();
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ReplaceMap.clear();
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DAG.RemoveDeadNodes();
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// Emit machine code to BB.
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