Allow machine LICM to do its job on SPU.

-return a sensible value for register pressure
-add pattern to 'ila' instrucion


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120285 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Kalle Raiskila 2010-11-29 10:08:09 +00:00
parent 11edd0cedc
commit b00f24b13c
2 changed files with 9 additions and 1 deletions

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@ -181,6 +181,14 @@ namespace llvm {
virtual bool isLegalAddressingMode(const AddrMode &AM, virtual bool isLegalAddressingMode(const AddrMode &AM,
const Type *Ty) const; const Type *Ty) const;
/// After allocating this many registers, the allocator should feel
/// register pressure. The value is a somewhat random guess, based on the
/// number of non callee saved registers in the C calling convention.
virtual unsigned getRegPressureLimit( const TargetRegisterClass *RC,
MachineFunction &MF) const{
return 50;
}
}; };
} }

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@ -416,7 +416,7 @@ multiclass ImmLoadAddress
def lo: ILARegInst<R32C, symbolLo, imm18>; def lo: ILARegInst<R32C, symbolLo, imm18>;
def lsa: ILAInst<(outs R32C:$rT), (ins symbolLSA:$val), def lsa: ILAInst<(outs R32C:$rT), (ins symbolLSA:$val),
[/* no pattern */]>; [(set R32C:$rT, imm18:$val)]>;
} }
defm ILA : ImmLoadAddress; defm ILA : ImmLoadAddress;