ARM: Fix another regression introduced in r223113

The changes in r223113 (ARM modified-immediate syntax) have broken
instructions like:
  mov r0, #~0xffffff00
The problem is that I've added a spurious range check on the immediate
operand to ensure that it lies between INT32_MIN and UINT32_MAX. While
this range check is correct in theory, it causes problems because the
operand is stored in an int64_t (by MC). So valid 32-bit constants like
\#~0xffffff00 become out of range. The solution is to simply remove this
range check. It is not possible to validate the range of the immediate
operand with the current setup because: 1) The operand is stored in an
int64_t by MC, 2) The immediate can be of the forms #imm, #-imm, #~imm
or even #((~imm)) etc. So we just chop the value to 32 bits and use it.

Also noted that the original range check was note tested by any of the
unit tests. I've added a new test to cover #~imm kind of operands.

Change-Id: I411e90d84312a2eff01b732bb238af536c4a7599

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228920 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Asiri Rathnayake 2015-02-12 13:37:28 +00:00
parent 95fa2f9326
commit b0d513e1eb
2 changed files with 2 additions and 5 deletions

View File

@ -4424,11 +4424,6 @@ ARMAsmParser::parseModImm(OperandVector &Operands) {
if (CE) {
// Immediate must fit within 32-bits
Imm1 = CE->getValue();
if (Imm1 < INT32_MIN || Imm1 > UINT32_MAX) {
Error(Sx1, "immediate operand must be representable with 32 bits");
return MatchOperand_ParseFail;
}
int Enc = ARM_AM::getSOImmVal(Imm1);
if (Enc != -1 && Parser.getTok().is(AsmToken::EndOfStatement)) {
// We have a match!

View File

@ -1509,6 +1509,7 @@ Lforward:
mvn r3, $7
mvn r3, 7
mvn r3, -7
mvn r7, #~0xffffff00
mvn r4, #0xff0
mvn r5, #0xff0000
mvn r7, #(0xff << 16)
@ -1526,6 +1527,7 @@ Lforward:
@ CHECK: mvn r3, #7 @ encoding: [0x07,0x30,0xe0,0xe3]
@ CHECK: mvn r3, #7 @ encoding: [0x07,0x30,0xe0,0xe3]
@ CHECK: mov r3, #6 @ encoding: [0x06,0x30,0xa0,0xe3]
@ CHECK: mvn r7, #255 @ encoding: [0xff,0x70,0xe0,0xe3]
@ CHECK: mvn r4, #4080 @ encoding: [0xff,0x4e,0xe0,0xe3]
@ CHECK: mvn r5, #16711680 @ encoding: [0xff,0x58,0xe0,0xe3]
@ CHECK: mvn r7, #16711680 @ encoding: [0xff,0x78,0xe0,0xe3]