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X86: Reject register operands with obvious type mismatches.

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While we have some code to transform specification like {ax} into
{eax}/{rax} if the operand type isn't 16bit, we should reject cases
where there is no sane way to do this, like the i128 type in the
example.

Related to rdar://21042280

Differential Revision: http://reviews.llvm.org/D10260

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239309 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matthias Braun 2015-06-08 16:56:23 +00:00
parent 7c40b1a7bc
commit b0d6c659b7
2 changed files with 23 additions and 0 deletions
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13
lib/Target/X86/X86ISelLowering.cpp
View File

@ -25517,6 +25517,10 @@ X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
Res.first = DestReg;
Res.second = &X86::GR64RegClass;
}
} else if (VT != MVT::Other) {
// Type mismatch and not a clobber: Return an error;
Res.first = 0;
Res.second = nullptr;
}
} else if (Res.second == &X86::FR32RegClass ||
Res.second == &X86::FR64RegClass ||
@ -25542,6 +25546,15 @@ X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
Res.second = &X86::VR256RegClass;
else if (X86::VR512RegClass.hasType(VT))
Res.second = &X86::VR512RegClass;
else if (VT != MVT::Other) {
// Type mismatch and not a clobber: Return an error;
Res.first = 0;
Res.second = nullptr;
}
} else if (VT != MVT::Other) {
// Type mismatch and not a clobber: Return an error;
Res.first = 0;
Res.second = nullptr;
}
return Res;

10
test/CodeGen/X86/asm-reject-reg-type-mismatch.ll Normal file
View File

@ -0,0 +1,10 @@
; RUN: not llc -no-integrated-as %s -o - 2> %t1
; RUN: FileCheck %s < %t1
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64--"
; CHECK: error: couldn't allocate output register for constraint '{ax}'
define i128 @blup() {
%v = tail call i128 asm "", "={ax},0,~{dirflag},~{fpsr},~{flags}"(i128 0)
ret i128 %v
}