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[arm fast-isel] Appease the machine verifier by using the proper register
classes. rdar://12719844 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168733 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2595,10 +2595,12 @@ unsigned ARMFastISel::ARMEmitIntExt(EVT SrcVT, unsigned SrcReg, EVT DestVT,
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break;
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break;
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case MVT::i8:
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case MVT::i8:
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if (!Subtarget->hasV6Ops()) return 0;
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if (!Subtarget->hasV6Ops()) return 0;
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if (isZExt)
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if (isZExt) {
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Opc = isThumb2 ? ARM::t2UXTB : ARM::UXTB;
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Opc = isThumb2 ? ARM::t2UXTB : ARM::UXTB;
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else
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} else {
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Opc = isThumb2 ? ARM::t2SXTB : ARM::SXTB;
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Opc = isThumb2 ? ARM::t2SXTB : ARM::SXTB;
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RC = isThumb2 ? &ARM::rGPRRegClass : &ARM::GPRnopcRegClass;
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}
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break;
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break;
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case MVT::i1:
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case MVT::i1:
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if (isZExt) {
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if (isZExt) {
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