diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp
index c4b45bf431e..a81ecfeace1 100644
--- a/lib/Target/X86/X86FastISel.cpp
+++ b/lib/Target/X86/X86FastISel.cpp
@@ -893,7 +893,7 @@ bool X86FastISel::X86SelectShift(Instruction *I) {
   if (ConstantInt *CI = dyn_cast<ConstantInt>(I->getOperand(1))) {
     unsigned ResultReg = createResultReg(RC);
     BuildMI(MBB, TII.get(OpImm), 
-            ResultReg).addReg(Op0Reg).addImm(CI->getZExtValue());
+            ResultReg).addReg(Op0Reg).addImm(CI->getZExtValue() & 0xff);
     UpdateValueMap(I, ResultReg);
     return true;
   }
diff --git a/test/CodeGen/X86/fast-isel-shift-imm.ll b/test/CodeGen/X86/fast-isel-shift-imm.ll
new file mode 100644
index 00000000000..c47b99013aa
--- /dev/null
+++ b/test/CodeGen/X86/fast-isel-shift-imm.ll
@@ -0,0 +1,7 @@
+; RUN: llvm-as < %s | llc -march=x86 -fast | grep {sarl	\$80, %eax}
+; PR3242
+
+define i32 @foo(i32 %x) nounwind {
+  %y = ashr i32 %x, 50000
+  ret i32 %y
+}