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merge two identical functions and simplify things that are GOT specific
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75091 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1319,18 +1319,9 @@ X86TargetLowering::NameDecorationForFORMAL_ARGUMENTS(SDValue Op) {
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}
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/// CallRequiresGOTInRegister - Check whether the call requires the GOT pointer
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/// in a register before calling.
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static bool CallRequiresGOTPtrInReg(const TargetMachine &TM) {
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const X86Subtarget &Subtarget = TM.getSubtarget<X86Subtarget>();
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return TM.getRelocationModel() == Reloc::PIC_ &&
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Subtarget.isPICStyleGOT();
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}
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/// CallRequiresFnAddressInReg - Check whether the call requires the function
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/// address to be loaded in a register.
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static bool CallRequiresFnAddressInReg(const TargetMachine &TM) {
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/// isUsingGOT - Return true if the target uses a GOT for PIC, and if we're in
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/// PIC mode.
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static bool isUsingGOT(const TargetMachine &TM) {
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const X86Subtarget &Subtarget = TM.getSubtarget<X86Subtarget>();
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return TM.getRelocationModel() == Reloc::PIC_ &&
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Subtarget.isPICStyleGOT();
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@ -1802,25 +1793,27 @@ SDValue X86TargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) {
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InFlag = Chain.getValue(1);
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}
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if (isUsingGOT(getTargetMachine())) {
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// ELF / PIC requires GOT in the EBX register before function calls via PLT
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// GOT pointer.
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if (!IsTailCall && CallRequiresGOTPtrInReg(getTargetMachine())) {
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if (!IsTailCall) {
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Chain = DAG.getCopyToReg(Chain, dl, X86::EBX,
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DAG.getNode(X86ISD::GlobalBaseReg,
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DebugLoc::getUnknownLoc(),
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getPointerTy()),
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InFlag);
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InFlag = Chain.getValue(1);
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}
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} else {
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// If we are tail calling and generating PIC/GOT style code load the
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// address of the callee into ECX. The value in ecx is used as target of
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// the tail jump. This is done to circumvent the ebx/callee-saved problem
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// for tail calls on PIC/GOT architectures. Normally we would just put the
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// address of GOT into ebx and then call target@PLT. But for tail calls
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// ebx would be restored (since ebx is callee saved) before jumping to the
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// target@PLT.
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// If we are tail calling and generating PIC/GOT style code load the address
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// of the callee into ecx. The value in ecx is used as target of the tail
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// jump. This is done to circumvent the ebx/callee-saved problem for tail
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// calls on PIC/GOT architectures. Normally we would just put the address of
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// GOT into ebx and then call target@PLT. But for tail calls ebx would be
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// restored (since ebx is callee saved) before jumping to the target@PLT.
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if (IsTailCall && CallRequiresFnAddressInReg(getTargetMachine())) {
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// Note: The actual moving to ecx is done further down.
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// Note: The actual moving to ECX is done further down.
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GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee);
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if (G && !G->getGlobal()->hasHiddenVisibility() &&
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!G->getGlobal()->hasProtectedVisibility())
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@ -1828,6 +1821,7 @@ SDValue X86TargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) {
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else if (isa<ExternalSymbolSDNode>(Callee))
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Callee = LowerExternalSymbol(Callee,DAG);
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}
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}
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if (Is64Bit && isVarArg) {
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// From AMD64 ABI document:
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@ -1958,9 +1952,7 @@ SDValue X86TargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) {
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RegsToPass[i].second.getValueType()));
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// Add an implicit use GOT pointer in EBX.
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if (!IsTailCall && !Is64Bit &&
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getTargetMachine().getRelocationModel() == Reloc::PIC_ &&
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Subtarget->isPICStyleGOT())
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if (!IsTailCall && isUsingGOT(getTargetMachine()))
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Ops.push_back(DAG.getRegister(X86::EBX, getPointerTy()));
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// Add an implicit use of AL for x86 vararg functions.
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@ -2080,7 +2072,7 @@ bool X86TargetLowering::IsEligibleForTailCallOptimization(CallSDNode *TheCall,
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SDValue Callee = TheCall->getCallee();
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// On x86/32Bit PIC/GOT tail calls are supported.
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if (getTargetMachine().getRelocationModel() != Reloc::PIC_ ||
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!Subtarget->isPICStyleGOT()|| !Subtarget->is64Bit())
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!Subtarget->isPICStyleGOT() || !Subtarget->is64Bit())
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return true;
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// Can only do local tail calls (in same module, hidden or protected) on
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