From b140762a45d21aaed054f15adaff0fc2274d939d Mon Sep 17 00:00:00 2001 From: Tanya Lattner Date: Fri, 25 Jun 2004 00:13:11 +0000 Subject: [PATCH] Made a fix so that you can print out MachineInstrs that belong to a MachineBasicBlock that is not yet attached to a MachineFunction. This change includes changing the third operand (TargetMachine) to a pointer for the MachineInstr::print function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14389 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/CodeGen/MachineInstr.h | 10 ++++++++-- lib/CodeGen/LiveIntervalAnalysis.cpp | 6 +++--- lib/CodeGen/MachineBasicBlock.cpp | 2 +- lib/CodeGen/MachineInstr.cpp | 23 ++++++++++++++++++----- lib/CodeGen/RegAllocSimple.cpp | 2 +- lib/CodeGen/TwoAddressInstructionPass.cpp | 6 +++--- lib/CodeGen/VirtRegMap.cpp | 12 ++++++------ lib/Target/X86/FloatingPoint.cpp | 4 ++-- lib/Target/X86/Printer.cpp | 2 +- lib/Target/X86/X86AsmPrinter.cpp | 2 +- lib/Target/X86/X86FloatingPoint.cpp | 4 ++-- 11 files changed, 46 insertions(+), 27 deletions(-) diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h index 02c881d64a9..97c60f9e3ad 100644 --- a/include/llvm/CodeGen/MachineInstr.h +++ b/include/llvm/CodeGen/MachineInstr.h @@ -308,7 +308,13 @@ public: // code.' It's not clear where the duplication is. assert(hasAllocatedReg() && "This operand cannot have a register number!"); regNum = Reg; - } + } + + void setValueReg(Value *val) { + assert(getVRegValueOrNull() != 0 && "Original operand must of type Value*"); + contents.value = val; + } + void setImmedValue(int immVal) { assert(isImmediate() && "Wrong MachineOperand mutator"); contents.immedVal = immVal; @@ -465,7 +471,7 @@ public: // // Debugging support // - void print(std::ostream &OS, const TargetMachine &TM) const; + void print(std::ostream &OS, const TargetMachine *TM) const; void dump() const; friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr); diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp index 91df40687ca..196d6944b7e 100644 --- a/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -179,7 +179,7 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) { for (MachineBasicBlock::iterator mii = mbbi->begin(), mie = mbbi->end(); mii != mie; ++mii) { std::cerr << getInstructionIndex(mii) << '\t'; - mii->print(std::cerr, *tm_); + mii->print(std::cerr, tm_); } }); @@ -427,7 +427,7 @@ void LiveIntervals::computeIntervals() const TargetInstrDescriptor& tid = tm_->getInstrInfo()->get(mi->getOpcode()); DEBUG(std::cerr << getInstructionIndex(mi) << "\t"; - mi->print(std::cerr, *tm_)); + mi->print(std::cerr, tm_)); // handle implicit defs for (const unsigned* id = tid.ImplicitDefs; *id; ++id) @@ -467,7 +467,7 @@ void LiveIntervals::joinIntervals() mi != mie; ++mi) { const TargetInstrDescriptor& tid = tii.get(mi->getOpcode()); DEBUG(std::cerr << getInstructionIndex(mi) << '\t'; - mi->print(std::cerr, *tm_);); + mi->print(std::cerr, tm_);); // we only join virtual registers with allocatable // physical registers since we do not have liveness information diff --git a/lib/CodeGen/MachineBasicBlock.cpp b/lib/CodeGen/MachineBasicBlock.cpp index 462c5626596..f4ef3ee21e3 100644 --- a/lib/CodeGen/MachineBasicBlock.cpp +++ b/lib/CodeGen/MachineBasicBlock.cpp @@ -105,6 +105,6 @@ void MachineBasicBlock::print(std::ostream &OS) const << ", LLVM BB @" << (const void*) LBB << "):\n"; for (const_iterator I = begin(); I != end(); ++I) { OS << "\t"; - I->print(OS, getParent()->getTarget()); + I->print(OS, &getParent()->getTarget()); } } diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp index f1a5c3ec525..3f7e713ca01 100644 --- a/lib/CodeGen/MachineInstr.cpp +++ b/lib/CodeGen/MachineInstr.cpp @@ -235,8 +235,14 @@ static inline void OutputReg(std::ostream &os, unsigned RegNo, } static void print(const MachineOperand &MO, std::ostream &OS, - const TargetMachine &TM) { - const MRegisterInfo *MRI = TM.getRegisterInfo(); + const TargetMachine *TM) { + + const MRegisterInfo *MRI = 0; + + if(TM) + MRI = TM->getRegisterInfo(); + + bool CloseParen = true; if (MO.isHiBits32()) OS << "%lm("; @@ -313,7 +319,7 @@ static void print(const MachineOperand &MO, std::ostream &OS, OS << ")"; } -void MachineInstr::print(std::ostream &OS, const TargetMachine &TM) const { +void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const { unsigned StartOp = 0; // Specialize printing if op#0 is definition @@ -322,7 +328,11 @@ void MachineInstr::print(std::ostream &OS, const TargetMachine &TM) const { OS << " = "; ++StartOp; // Don't print this operand again! } - OS << TM.getInstrInfo()->getName(getOpcode()); + + //Must check if Target machine is not null because machine BB could not + //be attached to a Machine function yet + if(TM) + OS << TM->getInstrInfo()->getName(getOpcode()); for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) { const MachineOperand& mop = getOperand(i); @@ -361,7 +371,10 @@ std::ostream &operator<<(std::ostream &os, const MachineInstr &MI) { // info for the instruction. if (const MachineBasicBlock *MBB = MI.getParent()) { const MachineFunction *MF = MBB->getParent(); - MI.print(os, MF->getTarget()); + if(MF) + MI.print(os, &MF->getTarget()); + else + MI.print(os, 0); return os; } diff --git a/lib/CodeGen/RegAllocSimple.cpp b/lib/CodeGen/RegAllocSimple.cpp index 4e825b233e3..ad46bbfec1d 100644 --- a/lib/CodeGen/RegAllocSimple.cpp +++ b/lib/CodeGen/RegAllocSimple.cpp @@ -177,7 +177,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) { unsigned virtualReg = (unsigned) op.getReg(); DEBUG(std::cerr << "op: " << op << "\n"); DEBUG(std::cerr << "\t inst[" << i << "]: "; - MI->print(std::cerr, *TM)); + MI->print(std::cerr, TM)); // make sure the same virtual register maps to the same physical // register in any given instruction diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp index 066260c241a..2190f2162e4 100644 --- a/lib/CodeGen/TwoAddressInstructionPass.cpp +++ b/lib/CodeGen/TwoAddressInstructionPass.cpp @@ -98,7 +98,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) { ++numTwoAddressInstrs; - DEBUG(std::cerr << '\t'; mi->print(std::cerr, TM)); + DEBUG(std::cerr << '\t'; mi->print(std::cerr, &TM)); assert(mi->getOperand(1).isRegister() && mi->getOperand(1).getReg() && @@ -140,7 +140,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) { MachineBasicBlock::iterator prevMi = prior(mi); DEBUG(std::cerr << "\t\tprepend:\t"; - prevMi->print(std::cerr, TM)); + prevMi->print(std::cerr, &TM)); if (LV) { // update live variables for regA @@ -170,7 +170,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) { mi->RemoveOperand(1); DEBUG(std::cerr << "\t\trewrite to:\t"; - mi->print(std::cerr, TM)); + mi->print(std::cerr, &TM)); } } diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp index 8fc687dcc07..e22d72c8fc4 100644 --- a/lib/CodeGen/VirtRegMap.cpp +++ b/lib/CodeGen/VirtRegMap.cpp @@ -149,7 +149,7 @@ namespace { mf.getSSARegMap()->getRegClass(virtReg)); loaded[virtReg] = true; DEBUG(std::cerr << '\t'; - prior(mii)->print(std::cerr, tm)); + prior(mii)->print(std::cerr, &tm)); ++numLoads; } if (mop.isDef() && @@ -165,7 +165,7 @@ namespace { mii->SetMachineOperandReg(i, physReg); } } - DEBUG(std::cerr << '\t'; mii->print(std::cerr, tm)); + DEBUG(std::cerr << '\t'; mii->print(std::cerr, &tm)); loaded.clear(); } } @@ -231,9 +231,9 @@ namespace { mri_->getRegClass(physReg)); ++numStores; DEBUG(std::cerr << "added: "; - prior(nextLastRef)->print(std::cerr, *tm_); + prior(nextLastRef)->print(std::cerr, tm_); std::cerr << "after: "; - lastDef->print(std::cerr, *tm_)); + lastDef->print(std::cerr, tm_)); lastDef_[virtReg] = 0; } p2vMap_[physReg] = 0; @@ -263,7 +263,7 @@ namespace { mri_->getRegClass(physReg)); ++numLoads; DEBUG(std::cerr << "added: "; - prior(mii)->print(std::cerr, *tm_)); + prior(mii)->print(std::cerr, tm_)); lastDef_[virtReg] = mii; } } @@ -339,7 +339,7 @@ namespace { } } - DEBUG(std::cerr << '\t'; mii->print(std::cerr, *tm_)); + DEBUG(std::cerr << '\t'; mii->print(std::cerr, tm_)); } for (unsigned i = 1, e = p2vMap_.size(); i != e; ++i) diff --git a/lib/Target/X86/FloatingPoint.cpp b/lib/Target/X86/FloatingPoint.cpp index a56e071cf14..fa2632f6fa8 100644 --- a/lib/Target/X86/FloatingPoint.cpp +++ b/lib/Target/X86/FloatingPoint.cpp @@ -194,7 +194,7 @@ bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) { ++NumFP; // Keep track of # of pseudo instrs DEBUG(std::cerr << "\nFPInst:\t"; - MI->print(std::cerr, MF.getTarget())); + MI->print(std::cerr, &(MF.getTarget()))); // Get dead variables list now because the MI pointer may be deleted as part // of processing! @@ -242,7 +242,7 @@ bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) { // Rewind to first instruction newly inserted. while (Start != BB.begin() && prior(Start) != PrevI) --Start; std::cerr << "Inserted instructions:\n\t"; - Start->print(std::cerr, MF.getTarget()); + Start->print(std::cerr, &MF.getTarget()); while (++Start != next(I)); } dumpStack(); diff --git a/lib/Target/X86/Printer.cpp b/lib/Target/X86/Printer.cpp index 2a9ba83b4ed..cfab9b196db 100644 --- a/lib/Target/X86/Printer.cpp +++ b/lib/Target/X86/Printer.cpp @@ -936,7 +936,7 @@ void Printer::printMachineInstruction(const MachineInstr *MI) { return; } default: - O << "\tUNKNOWN FORM:\t\t-"; MI->print(O, TM); break; + O << "\tUNKNOWN FORM:\t\t-"; MI->print(O, &TM); break; } } diff --git a/lib/Target/X86/X86AsmPrinter.cpp b/lib/Target/X86/X86AsmPrinter.cpp index 2a9ba83b4ed..cfab9b196db 100644 --- a/lib/Target/X86/X86AsmPrinter.cpp +++ b/lib/Target/X86/X86AsmPrinter.cpp @@ -936,7 +936,7 @@ void Printer::printMachineInstruction(const MachineInstr *MI) { return; } default: - O << "\tUNKNOWN FORM:\t\t-"; MI->print(O, TM); break; + O << "\tUNKNOWN FORM:\t\t-"; MI->print(O, &TM); break; } } diff --git a/lib/Target/X86/X86FloatingPoint.cpp b/lib/Target/X86/X86FloatingPoint.cpp index a56e071cf14..fa2632f6fa8 100644 --- a/lib/Target/X86/X86FloatingPoint.cpp +++ b/lib/Target/X86/X86FloatingPoint.cpp @@ -194,7 +194,7 @@ bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) { ++NumFP; // Keep track of # of pseudo instrs DEBUG(std::cerr << "\nFPInst:\t"; - MI->print(std::cerr, MF.getTarget())); + MI->print(std::cerr, &(MF.getTarget()))); // Get dead variables list now because the MI pointer may be deleted as part // of processing! @@ -242,7 +242,7 @@ bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) { // Rewind to first instruction newly inserted. while (Start != BB.begin() && prior(Start) != PrevI) --Start; std::cerr << "Inserted instructions:\n\t"; - Start->print(std::cerr, MF.getTarget()); + Start->print(std::cerr, &MF.getTarget()); while (++Start != next(I)); } dumpStack();