git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218223 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault 2014-09-21 17:27:32 +00:00
parent 19ebadd716
commit b16c657c18

View File

@ -221,10 +221,9 @@ bool SIShrinkInstructions::runOnMachineFunction(MachineFunction &MF) {
// vreg1 = VOPC;
// S_AND_B64 vreg0, vreg1
//
// So, instead of forcing the instruction to write to VCC, we provide a
// hint to the register allocator to use VCC and then we
// we will run this pass again after RA and shrink it if it outpus to
// VCC.
// So, instead of forcing the instruction to write to VCC, we provide
// a hint to the register allocator to use VCC and then we we will run
// this pass again after RA and shrink it if it outputs to VCC.
MRI.setRegAllocationHint(MI.getOperand(0).getReg(), 0, AMDGPU::VCC);
continue;
}