From b1c54930cb1450534d6f3f0ebd81eb1e042a3246 Mon Sep 17 00:00:00 2001 From: Eli Friedman Date: Mon, 9 Sep 2013 22:00:13 +0000 Subject: [PATCH] Don't shrink atomic ops to bool in GlobalOpt. LLVM IR doesn't currently allow atomic bool load/store operations, and the transformation is dubious anyway because it isn't profitable on all platforms. PR17163. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190357 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Transforms/IPO/GlobalOpt.cpp | 11 +++++++---- test/Transforms/GlobalOpt/atomic.ll | 15 +++++++++++++++ 2 files changed, 22 insertions(+), 4 deletions(-) diff --git a/lib/Transforms/IPO/GlobalOpt.cpp b/lib/Transforms/IPO/GlobalOpt.cpp index 46592711214..29c1b6a6c94 100644 --- a/lib/Transforms/IPO/GlobalOpt.cpp +++ b/lib/Transforms/IPO/GlobalOpt.cpp @@ -2046,11 +2046,14 @@ bool GlobalOpt::ProcessInternalGlobal(GlobalVariable *GV, // Otherwise, if the global was not a boolean, we can shrink it to be a // boolean. - if (Constant *SOVConstant = dyn_cast(GS.StoredOnceValue)) - if (TryToShrinkGlobalToBoolean(GV, SOVConstant)) { - ++NumShrunkToBool; - return true; + if (Constant *SOVConstant = dyn_cast(GS.StoredOnceValue)) { + if (GS.Ordering == NotAtomic) { + if (TryToShrinkGlobalToBoolean(GV, SOVConstant)) { + ++NumShrunkToBool; + return true; + } } + } } return false; diff --git a/test/Transforms/GlobalOpt/atomic.ll b/test/Transforms/GlobalOpt/atomic.ll index 4c3f4395a0e..ac05bfd68d9 100644 --- a/test/Transforms/GlobalOpt/atomic.ll +++ b/test/Transforms/GlobalOpt/atomic.ll @@ -1,10 +1,25 @@ ; RUN: opt -globalopt < %s -S -o - | FileCheck %s @GV1 = internal global i64 1 +@GV2 = internal global i32 0 + ; CHECK: @GV1 = internal unnamed_addr constant i64 1 +; CHECK: @GV2 = internal unnamed_addr global i32 0 define void @test1() { entry: %0 = load atomic i8* bitcast (i64* @GV1 to i8*) acquire, align 8 ret void } + +; PR17163 +define void @test2a() { +entry: + store atomic i32 10, i32* @GV2 seq_cst, align 4 + ret void +} +define i32 @test2b() { +entry: + %atomic-load = load atomic i32* @GV2 seq_cst, align 4 + ret i32 %atomic-load +}