From b20aaceb52b2267dbdfaf07b27cd0545b3939cde Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Fri, 24 Mar 2006 02:57:03 +0000 Subject: [PATCH] A new entry git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27039 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/README.txt | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/lib/Target/X86/README.txt b/lib/Target/X86/README.txt index 4972818dbf5..1c227d3fd14 100644 --- a/lib/Target/X86/README.txt +++ b/lib/Target/X86/README.txt @@ -644,3 +644,14 @@ lambda, siod, optimizer-eval, ackermann, hash2, nestedloop, strcat, and Treesor. Teach the coallescer to coales vregs of different register classes. e.g. FR32 / FR64 to VR128. + +//===---------------------------------------------------------------------===// + +mov $reg, 48(%esp) +... +leal 48(%esp), %eax +mov %eax, (%esp) +call _foo + +Obviously it would have been better for the first mov (or any op) to store +directly %esp[0] if there are no other uses.