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Handle regmasks in Thumb1RegisterInfo::saveScavengerRegister().

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This function could have r12 live across a function call when compiling
thumb1 code.

The test case for this is not included because it is very long. It must
provoke emergency spilling near a function call. The behavior is
provoked by MultiSource/Applications/JM/lencod, and it triggers an
assertion in the scavenger.

<rdar://problem/10963642>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151855 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2012-03-01 22:57:32 +00:00
parent 12313a56ec
commit b24b820bd7
1 changed files with 5 additions and 0 deletions
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5
lib/Target/ARM/Thumb1RegisterInfo.cpp
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@ -571,6 +571,11 @@ Thumb1RegisterInfo::saveScavengerRegister(MachineBasicBlock &MBB,
// If this instruction affects R12, adjust our restore point.
for (unsigned i = 0, e = II->getNumOperands(); i != e; ++i) {
const MachineOperand &MO = II->getOperand(i);
if (MO.isRegMask() && MO.clobbersPhysReg(ARM::R12)) {
UseMI = II;
done = true;
break;
}
if (!MO.isReg() || MO.isUndef() || !MO.getReg() ||
TargetRegisterInfo::isVirtualRegister(MO.getReg()))
continue;