mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-23 02:29:18 +00:00
Make a new llvm/Target #include directory.
Move files from lib/CodeGen/TargetMachine to lib/Target Move TargetData.h and TargetMachine.h to Target/{Data.h|Machine.h} Prepare to split TargetMachine.h into several smaller files git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@566 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
f6e0e28135
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@ -19,7 +19,7 @@
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#include "llvm/CodeGen/InstrForest.h"
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#include "llvm/CodeGen/InstrForest.h"
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#include "llvm/Support/DataTypes.h"
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#include "llvm/Support/DataTypes.h"
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#include "llvm/Support/NonCopyable.h"
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#include "llvm/Support/NonCopyable.h"
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#include "llvm/CodeGen/TargetMachine.h"
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#include "llvm/Target/Machine.h"
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template<class _MI, class _V> class ValOpIterator;
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template<class _MI, class _V> class ValOpIterator;
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@ -16,19 +16,14 @@
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*/
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*/
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#ifndef REG_CLASS_H
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#ifndef REG_CLASS_H
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#define REG_CLASS_H
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#define REG_CLASS_H
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#include "llvm/CodeGen/IGNode.h"
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#include "llvm/CodeGen/IGNode.h"
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#include "llvm/CodeGen/InterferenceGraph.h"
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#include "llvm/CodeGen/InterferenceGraph.h"
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#include "llvm/CodeGen/TargetMachine.h"
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#include "llvm/Target/Machine.h"
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#include <stack>
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#include <stack>
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typedef vector<unsigned int> ReservedColorListType;
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typedef vector<unsigned int> ReservedColorListType;
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@ -1,4 +1,4 @@
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//===-- llvm/TargetData.h - Data size & alignment routines -------*- C++ -*-==//
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//===-- llvm/Target/Data.h - Data size & alignment routines ------*- C++ -*-==//
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//
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//
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// This file defines target properties related to datatype size/offset/alignment
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// This file defines target properties related to datatype size/offset/alignment
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// information. It uses lazy annotations to cache information about how
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// information. It uses lazy annotations to cache information about how
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@ -10,8 +10,8 @@
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//
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_TARGETDATA_H
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#ifndef LLVM_TARGET_DATA_H
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#define LLVM_CODEGEN_TARGETDATA_H
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#define LLVM_TARGET_DATA_H
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#include "llvm/Type.h"
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#include "llvm/Type.h"
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#include <vector>
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#include <vector>
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@ -1,18 +1,13 @@
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// $Id$ -*-c++-*-
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//===-- llvm/Target/Machine.h - General Target Information -------*- C++ -*-==//
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//***************************************************************************
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//
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// File:
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// This file describes the general parts of a Target machine.
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// TargetMachine.h
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//
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//
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//===----------------------------------------------------------------------===//
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// Purpose:
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//
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// History:
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// 7/12/01 - Vikram Adve - Created
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//**************************************************************************/
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#ifndef LLVM_CODEGEN_TARGETMACHINE_H
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#ifndef LLVM_TARGET_MACHINE_H
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#define LLVM_CODEGEN_TARGETMACHINE_H
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#define LLVM_TARGET_MACHINE_H
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#include "llvm/CodeGen/TargetData.h"
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#include "llvm/Target/Data.h"
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#include "llvm/Support/NonCopyable.h"
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#include "llvm/Support/NonCopyable.h"
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#include "llvm/Support/DataTypes.h"
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#include "llvm/Support/DataTypes.h"
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#include <string>
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#include <string>
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@ -24,8 +19,6 @@ class StructType;
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struct MachineInstrDescriptor;
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struct MachineInstrDescriptor;
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class TargetMachine;
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class TargetMachine;
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//************************ Exported Data Types *****************************/
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//---------------------------------------------------------------------------
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//---------------------------------------------------------------------------
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// Data types used to define information about a single machine instruction
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// Data types used to define information about a single machine instruction
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//---------------------------------------------------------------------------
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//---------------------------------------------------------------------------
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@ -518,7 +511,7 @@ public:
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int l1DCacheMissPenalty; // 7 or 9 for SPARC IIi
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int l1DCacheMissPenalty; // 7 or 9 for SPARC IIi
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int l1ICacheMissPenalty; // ? for SPARC IIi
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int l1ICacheMissPenalty; // ? for SPARC IIi
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bool inOrderLoads ; // true for SPARC IIi
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bool inOrderLoads; // true for SPARC IIi
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bool inOrderIssue; // true for SPARC IIi
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bool inOrderIssue; // true for SPARC IIi
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bool inOrderExec; // false for most architectures
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bool inOrderExec; // false for most architectures
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bool inOrderRetire; // true for most architectures
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bool inOrderRetire; // true for most architectures
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@ -714,7 +707,7 @@ public:
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virtual void colorCallArgs(vector<const Instruction *> & CallInstrList,
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virtual void colorCallArgs(vector<const Instruction *> & CallInstrList,
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LiveRangeInfo& LRI,
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LiveRangeInfo& LRI,
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AddedInstrMapType& AddedInstrMap ) const = 0 ;
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AddedInstrMapType& AddedInstrMap ) const = 0;
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virtual int getUnifiedRegNum(int RegClassID, int reg) const = 0;
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virtual int getUnifiedRegNum(int RegClassID, int reg) const = 0;
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17
include/llvm/Target/TargetMachineImpls.h
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17
include/llvm/Target/TargetMachineImpls.h
Normal file
@ -0,0 +1,17 @@
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//===-- llvm/CodeGen/Sparc.h - Sparc Target Description ----------*- C++ -*--=//
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//
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// This file defines the Sparc processor targets
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_SPARC_H
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#define LLVM_CODEGEN_SPARC_H
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class TargetMachine;
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// allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine
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// that implements the Sparc backend.
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//
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TargetMachine *allocateSparcTargetMachine();
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#endif
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@ -12,7 +12,7 @@
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#include "llvm/CodeGen/InstrScheduling.h"
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#include "llvm/CodeGen/InstrScheduling.h"
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#include "llvm/CodeGen/SchedPriorities.h"
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#include "llvm/CodeGen/SchedPriorities.h"
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#include "llvm/Analysis/LiveVar/BBLiveVar.h"
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#include "llvm/Analysis/LiveVar/BBLiveVar.h"
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#include "llvm/CodeGen/TargetMachine.h"
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#include "llvm/Target/Machine.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Instruction.h"
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#include "llvm/Instruction.h"
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#include "llvm/Method.h"
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#include "llvm/Method.h"
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#include "llvm/CodeGen/SchedGraph.h"
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#include "llvm/CodeGen/SchedGraph.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/TargetMachine.h"
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#include "llvm/Target/Machine.h"
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#include "llvm/Support/StringExtras.h"
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#include "llvm/Support/StringExtras.h"
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#include <algorithm>
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#include <algorithm>
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LEVEL = ../..
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LEVEL = ../..
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DIRS = TargetMachine InstrSelection InstrSched
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DIRS = InstrSelection InstrSched
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include $(LEVEL)/Makefile.common
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include $(LEVEL)/Makefile.common
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*/
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*/
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#ifndef REG_CLASS_H
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#ifndef REG_CLASS_H
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#define REG_CLASS_H
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#define REG_CLASS_H
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#include "llvm/CodeGen/IGNode.h"
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#include "llvm/CodeGen/IGNode.h"
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#include "llvm/CodeGen/InterferenceGraph.h"
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#include "llvm/CodeGen/InterferenceGraph.h"
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#include "llvm/CodeGen/TargetMachine.h"
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#include "llvm/Target/Machine.h"
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#include <stack>
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#include <stack>
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typedef vector<unsigned int> ReservedColorListType;
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typedef vector<unsigned int> ReservedColorListType;
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LEVEL = ../../..
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LIBRARYNAME = target
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include $(LEVEL)/Makefile.common
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#include "llvm/ConstPoolVals.h"
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#include "llvm/ConstPoolVals.h"
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#include "llvm/Assembly/Writer.h"
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#include "llvm/Assembly/Writer.h"
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#include "llvm/Support/DataTypes.h"
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#include "llvm/Support/DataTypes.h"
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#include "llvm/CodeGen/TargetData.h"
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#include "llvm/Target/Data.h"
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static unsigned getOperandSlot(Value *V) {
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static unsigned getOperandSlot(Value *V) {
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SlotNumber *SN = (SlotNumber*)V->getAnnotation(SlotNumberAID);
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SlotNumber *SN = (SlotNumber*)V->getAnnotation(SlotNumberAID);
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LEVEL = ../..
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LEVEL = ../..
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DIRS = Sparc
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DIRS = Sparc
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LIBRARYNAME = target
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include $(LEVEL)/Makefile.common
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include $(LEVEL)/Makefile.common
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#include "llvm/CodeGen/InstrScheduling.h"
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#include "llvm/CodeGen/InstrScheduling.h"
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#include "llvm/CodeGen/SchedPriorities.h"
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#include "llvm/CodeGen/SchedPriorities.h"
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#include "llvm/Analysis/LiveVar/BBLiveVar.h"
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#include "llvm/Analysis/LiveVar/BBLiveVar.h"
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#include "llvm/CodeGen/TargetMachine.h"
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#include "llvm/Target/Machine.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Instruction.h"
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#include "llvm/Instruction.h"
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#include "llvm/Method.h"
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#include "llvm/Method.h"
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#include "llvm/CodeGen/SchedGraph.h"
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#include "llvm/CodeGen/SchedGraph.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/TargetMachine.h"
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#include "llvm/Target/Machine.h"
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#include "llvm/Support/StringExtras.h"
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#include "llvm/Support/StringExtras.h"
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#include <algorithm>
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#include <algorithm>
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*/
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*/
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#ifndef REG_CLASS_H
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#ifndef REG_CLASS_H
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#define REG_CLASS_H
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#define REG_CLASS_H
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#include "llvm/CodeGen/IGNode.h"
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#include "llvm/CodeGen/IGNode.h"
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#include "llvm/CodeGen/InterferenceGraph.h"
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#include "llvm/CodeGen/InterferenceGraph.h"
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#include "llvm/CodeGen/TargetMachine.h"
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#include "llvm/Target/Machine.h"
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#include <stack>
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#include <stack>
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typedef vector<unsigned int> ReservedColorListType;
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typedef vector<unsigned int> ReservedColorListType;
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#ifndef SPARC_INTERNALS_H
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#ifndef SPARC_INTERNALS_H
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#define SPARC_INTERNALS_H
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#define SPARC_INTERNALS_H
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#include "llvm/CodeGen/TargetMachine.h"
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#include "llvm/Target/Machine.h"
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#include "SparcRegInfo.h"
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#include "SparcRegInfo.h"
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#include <sys/types.h>
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#include <sys/types.h>
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Purpose: Contains the description of integer register class of Sparc
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Purpose: Contains the description of integer register class of Sparc
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*/
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*/
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#ifndef SPARC_INT_REG_CLASS_H
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#ifndef SPARC_INT_REG_CLASS_H
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#define SPARC_INT_REG_CLASS_H
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#define SPARC_INT_REG_CLASS_H
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#include "llvm/CodeGen/TargetMachine.h"
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#include "llvm/Target/Machine.h"
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// Integer Register Class
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// Integer Register Class
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// Int register names in same order as enum in class SparcIntRegOrder
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// Int register names in same order as enum in class SparcIntRegOrder
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//
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static string const IntRegNames[] =
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static string const IntRegNames[] =
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{ "g1", "g2", "g3", "g4", "g5", "g6", "g7",
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{ "g1", "g2", "g3", "g4", "g5", "g6", "g7",
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"o0", "o1", "o2", "o3", "o4", "o5", "o7",
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"o0", "o1", "o2", "o3", "o4", "o5", "o7",
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//
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/TargetData.h"
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#include "llvm/Target/Data.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/ConstPoolVals.h"
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#include "llvm/ConstPoolVals.h"
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// $Id$
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//===-- TargetMachine.cpp - General Target Information ---------------------==//
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//***************************************************************************
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//
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// File:
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// This file describes the general parts of a Target machine.
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// TargetMachine.cpp
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//
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//
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//===----------------------------------------------------------------------===//
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// Purpose:
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//
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// History:
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// 7/12/01 - Vikram Adve - Created
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//**************************************************************************/
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#include "llvm/Target/Machine.h"
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//*************************** User Include Files ***************************/
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#include "llvm/CodeGen/TargetMachine.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/DerivedTypes.h"
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//************************ Exported Constants ******************************/
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// External object describing the machine instructions
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// External object describing the machine instructions
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// Initialized only when the TargetMachine class is created
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// Initialized only when the TargetMachine class is created
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// and reset when that class is destroyed.
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// and reset when that class is destroyed.
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@ -26,17 +15,12 @@ const MachineInstrDescriptor* TargetInstrDescriptors = NULL;
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resourceId_t MachineResource::nextId = 0;
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resourceId_t MachineResource::nextId = 0;
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//************************* Forward Declarations **************************/
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static cycles_t ComputeMinGap (const InstrRUsage& fromRU,
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static cycles_t ComputeMinGap (const InstrRUsage& fromRU,
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const InstrRUsage& toRU);
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const InstrRUsage& toRU);
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static bool RUConflict (const vector<resourceId_t>& fromRVec,
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static bool RUConflict (const vector<resourceId_t>& fromRVec,
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const vector<resourceId_t>& fromRVec);
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const vector<resourceId_t>& fromRVec);
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//************************ Class Implementations **************************/
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//---------------------------------------------------------------------------
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//---------------------------------------------------------------------------
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// class TargetMachine
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// class TargetMachine
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//
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//
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//===------------------------------------------------------------------------===
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//===-- llc.cpp - Implement the LLVM Compiler -----------------------------===//
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// LLVM 'LLC' UTILITY
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//
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//
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// This is the llc compiler driver.
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// This is the llc compiler driver.
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//
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//
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//===------------------------------------------------------------------------===
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//===----------------------------------------------------------------------===//
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#include "llvm/Bytecode/Reader.h"
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#include "llvm/Bytecode/Reader.h"
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#include "llvm/Optimizations/Normalize.h"
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#include "llvm/Optimizations/Normalize.h"
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#include "llvm/CodeGen/Sparc.h"
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#include "llvm/Target/Sparc.h"
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#include "llvm/CodeGen/TargetMachine.h"
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#include "llvm/Target/Machine.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Module.h"
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#include "llvm/Module.h"
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#include "llvm/Method.h"
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#include "llvm/Method.h"
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@ -20,46 +19,39 @@ static void NormalizeMethod(Method* method) {
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NormalizePhiConstantArgs(method);
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NormalizePhiConstantArgs(method);
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}
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}
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//===----------------------------------------------------------------------===//
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static bool CompileModule(Module *M, TargetMachine &Target) {
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for (Module::const_iterator MI = M->begin(), ME = M->end(); MI != ME; ++MI) {
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Method *Meth = *MI;
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NormalizeMethod(Meth);
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if (Target.compileMethod(Meth)) return true;
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}
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return false;
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}
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//---------------------------------------------------------------------------
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// Function main()
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// Function main()
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//===----------------------------------------------------------------------===//
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||||||
//
|
//
|
||||||
// Entry point for the llc compiler.
|
// Entry point for the llc compiler.
|
||||||
//---------------------------------------------------------------------------
|
//
|
||||||
|
|
||||||
int main(int argc, char** argv) {
|
int main(int argc, char** argv) {
|
||||||
cl::ParseCommandLineOptions(argc, argv, " llvm system compiler\n");
|
cl::ParseCommandLineOptions(argc, argv, " llvm system compiler\n");
|
||||||
TargetMachine *Target = allocateSparcTargetMachine();
|
TargetMachine *Target = allocateSparcTargetMachine();
|
||||||
|
|
||||||
Module *module = ParseBytecodeFile(InputFilename);
|
Module *M = ParseBytecodeFile(InputFilename);
|
||||||
if (module == 0) {
|
if (M == 0) {
|
||||||
cerr << "bytecode didn't read correctly.\n";
|
cerr << "bytecode didn't read correctly.\n";
|
||||||
|
delete Target;
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (CompileModule(module, *Target)) {
|
bool Failed = false;
|
||||||
cerr << "Error compiling " << InputFilename << "!\n";
|
for (Module::const_iterator MI = M->begin(), ME = M->end(); MI != ME; ++MI) {
|
||||||
delete module;
|
Method *Meth = *MI;
|
||||||
return 1;
|
|
||||||
|
NormalizeMethod(Meth);
|
||||||
|
|
||||||
|
if (Target->compileMethod(Meth)) {
|
||||||
|
cerr << "Error compiling " << InputFilename << "!\n";
|
||||||
|
Failed = true;
|
||||||
|
break;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
// Clean up and exit
|
// Clean up and exit
|
||||||
delete module;
|
delete M;
|
||||||
delete Target;
|
delete Target;
|
||||||
return 0;
|
return Failed;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user