Make a new llvm/Target #include directory.

Move files from lib/CodeGen/TargetMachine to lib/Target
Move TargetData.h and TargetMachine.h to Target/{Data.h|Machine.h}
Prepare to split TargetMachine.h into several smaller files


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@566 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2001-09-14 05:34:53 +00:00
parent f6e0e28135
commit b26bcc5087
21 changed files with 74 additions and 110 deletions

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@ -19,7 +19,7 @@
#include "llvm/CodeGen/InstrForest.h" #include "llvm/CodeGen/InstrForest.h"
#include "llvm/Support/DataTypes.h" #include "llvm/Support/DataTypes.h"
#include "llvm/Support/NonCopyable.h" #include "llvm/Support/NonCopyable.h"
#include "llvm/CodeGen/TargetMachine.h" #include "llvm/Target/Machine.h"
template<class _MI, class _V> class ValOpIterator; template<class _MI, class _V> class ValOpIterator;

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@ -16,19 +16,14 @@
*/ */
#ifndef REG_CLASS_H #ifndef REG_CLASS_H
#define REG_CLASS_H #define REG_CLASS_H
#include "llvm/CodeGen/IGNode.h" #include "llvm/CodeGen/IGNode.h"
#include "llvm/CodeGen/InterferenceGraph.h" #include "llvm/CodeGen/InterferenceGraph.h"
#include "llvm/CodeGen/TargetMachine.h" #include "llvm/Target/Machine.h"
#include <stack> #include <stack>
typedef vector<unsigned int> ReservedColorListType; typedef vector<unsigned int> ReservedColorListType;

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@ -1,4 +1,4 @@
//===-- llvm/TargetData.h - Data size & alignment routines -------*- C++ -*-==// //===-- llvm/Target/Data.h - Data size & alignment routines ------*- C++ -*-==//
// //
// This file defines target properties related to datatype size/offset/alignment // This file defines target properties related to datatype size/offset/alignment
// information. It uses lazy annotations to cache information about how // information. It uses lazy annotations to cache information about how
@ -10,8 +10,8 @@
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_TARGETDATA_H #ifndef LLVM_TARGET_DATA_H
#define LLVM_CODEGEN_TARGETDATA_H #define LLVM_TARGET_DATA_H
#include "llvm/Type.h" #include "llvm/Type.h"
#include <vector> #include <vector>

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@ -1,18 +1,13 @@
// $Id$ -*-c++-*- //===-- llvm/Target/Machine.h - General Target Information -------*- C++ -*-==//
//*************************************************************************** //
// File: // This file describes the general parts of a Target machine.
// TargetMachine.h //
// //===----------------------------------------------------------------------===//
// Purpose:
//
// History:
// 7/12/01 - Vikram Adve - Created
//**************************************************************************/
#ifndef LLVM_CODEGEN_TARGETMACHINE_H #ifndef LLVM_TARGET_MACHINE_H
#define LLVM_CODEGEN_TARGETMACHINE_H #define LLVM_TARGET_MACHINE_H
#include "llvm/CodeGen/TargetData.h" #include "llvm/Target/Data.h"
#include "llvm/Support/NonCopyable.h" #include "llvm/Support/NonCopyable.h"
#include "llvm/Support/DataTypes.h" #include "llvm/Support/DataTypes.h"
#include <string> #include <string>
@ -24,8 +19,6 @@ class StructType;
struct MachineInstrDescriptor; struct MachineInstrDescriptor;
class TargetMachine; class TargetMachine;
//************************ Exported Data Types *****************************/
//--------------------------------------------------------------------------- //---------------------------------------------------------------------------
// Data types used to define information about a single machine instruction // Data types used to define information about a single machine instruction
//--------------------------------------------------------------------------- //---------------------------------------------------------------------------
@ -518,7 +511,7 @@ public:
int l1DCacheMissPenalty; // 7 or 9 for SPARC IIi int l1DCacheMissPenalty; // 7 or 9 for SPARC IIi
int l1ICacheMissPenalty; // ? for SPARC IIi int l1ICacheMissPenalty; // ? for SPARC IIi
bool inOrderLoads ; // true for SPARC IIi bool inOrderLoads; // true for SPARC IIi
bool inOrderIssue; // true for SPARC IIi bool inOrderIssue; // true for SPARC IIi
bool inOrderExec; // false for most architectures bool inOrderExec; // false for most architectures
bool inOrderRetire; // true for most architectures bool inOrderRetire; // true for most architectures
@ -714,7 +707,7 @@ public:
virtual void colorCallArgs(vector<const Instruction *> & CallInstrList, virtual void colorCallArgs(vector<const Instruction *> & CallInstrList,
LiveRangeInfo& LRI, LiveRangeInfo& LRI,
AddedInstrMapType& AddedInstrMap ) const = 0 ; AddedInstrMapType& AddedInstrMap ) const = 0;
virtual int getUnifiedRegNum(int RegClassID, int reg) const = 0; virtual int getUnifiedRegNum(int RegClassID, int reg) const = 0;

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@ -0,0 +1,17 @@
//===-- llvm/CodeGen/Sparc.h - Sparc Target Description ----------*- C++ -*--=//
//
// This file defines the Sparc processor targets
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_SPARC_H
#define LLVM_CODEGEN_SPARC_H
class TargetMachine;
// allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine
// that implements the Sparc backend.
//
TargetMachine *allocateSparcTargetMachine();
#endif

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@ -12,7 +12,7 @@
#include "llvm/CodeGen/InstrScheduling.h" #include "llvm/CodeGen/InstrScheduling.h"
#include "llvm/CodeGen/SchedPriorities.h" #include "llvm/CodeGen/SchedPriorities.h"
#include "llvm/Analysis/LiveVar/BBLiveVar.h" #include "llvm/Analysis/LiveVar/BBLiveVar.h"
#include "llvm/CodeGen/TargetMachine.h" #include "llvm/Target/Machine.h"
#include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineInstr.h"
#include "llvm/Support/CommandLine.h" #include "llvm/Support/CommandLine.h"
#include "llvm/Instruction.h" #include "llvm/Instruction.h"

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@ -18,7 +18,7 @@
#include "llvm/Method.h" #include "llvm/Method.h"
#include "llvm/CodeGen/SchedGraph.h" #include "llvm/CodeGen/SchedGraph.h"
#include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/TargetMachine.h" #include "llvm/Target/Machine.h"
#include "llvm/Support/StringExtras.h" #include "llvm/Support/StringExtras.h"
#include <algorithm> #include <algorithm>

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@ -1,4 +1,4 @@
LEVEL = ../.. LEVEL = ../..
DIRS = TargetMachine InstrSelection InstrSched DIRS = InstrSelection InstrSched
include $(LEVEL)/Makefile.common include $(LEVEL)/Makefile.common

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@ -16,19 +16,14 @@
*/ */
#ifndef REG_CLASS_H #ifndef REG_CLASS_H
#define REG_CLASS_H #define REG_CLASS_H
#include "llvm/CodeGen/IGNode.h" #include "llvm/CodeGen/IGNode.h"
#include "llvm/CodeGen/InterferenceGraph.h" #include "llvm/CodeGen/InterferenceGraph.h"
#include "llvm/CodeGen/TargetMachine.h" #include "llvm/Target/Machine.h"
#include <stack> #include <stack>
typedef vector<unsigned int> ReservedColorListType; typedef vector<unsigned int> ReservedColorListType;

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@ -1,5 +0,0 @@
LEVEL = ../../..
LIBRARYNAME = target
include $(LEVEL)/Makefile.common

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@ -13,7 +13,7 @@
#include "llvm/ConstPoolVals.h" #include "llvm/ConstPoolVals.h"
#include "llvm/Assembly/Writer.h" #include "llvm/Assembly/Writer.h"
#include "llvm/Support/DataTypes.h" #include "llvm/Support/DataTypes.h"
#include "llvm/CodeGen/TargetData.h" #include "llvm/Target/Data.h"
static unsigned getOperandSlot(Value *V) { static unsigned getOperandSlot(Value *V) {
SlotNumber *SN = (SlotNumber*)V->getAnnotation(SlotNumberAID); SlotNumber *SN = (SlotNumber*)V->getAnnotation(SlotNumberAID);

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@ -1,5 +1,5 @@
LEVEL = ../.. LEVEL = ../..
DIRS = Sparc DIRS = Sparc
LIBRARYNAME = target
include $(LEVEL)/Makefile.common include $(LEVEL)/Makefile.common

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@ -12,7 +12,7 @@
#include "llvm/CodeGen/InstrScheduling.h" #include "llvm/CodeGen/InstrScheduling.h"
#include "llvm/CodeGen/SchedPriorities.h" #include "llvm/CodeGen/SchedPriorities.h"
#include "llvm/Analysis/LiveVar/BBLiveVar.h" #include "llvm/Analysis/LiveVar/BBLiveVar.h"
#include "llvm/CodeGen/TargetMachine.h" #include "llvm/Target/Machine.h"
#include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineInstr.h"
#include "llvm/Support/CommandLine.h" #include "llvm/Support/CommandLine.h"
#include "llvm/Instruction.h" #include "llvm/Instruction.h"

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@ -18,7 +18,7 @@
#include "llvm/Method.h" #include "llvm/Method.h"
#include "llvm/CodeGen/SchedGraph.h" #include "llvm/CodeGen/SchedGraph.h"
#include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/TargetMachine.h" #include "llvm/Target/Machine.h"
#include "llvm/Support/StringExtras.h" #include "llvm/Support/StringExtras.h"
#include <algorithm> #include <algorithm>

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@ -16,19 +16,14 @@
*/ */
#ifndef REG_CLASS_H #ifndef REG_CLASS_H
#define REG_CLASS_H #define REG_CLASS_H
#include "llvm/CodeGen/IGNode.h" #include "llvm/CodeGen/IGNode.h"
#include "llvm/CodeGen/InterferenceGraph.h" #include "llvm/CodeGen/InterferenceGraph.h"
#include "llvm/CodeGen/TargetMachine.h" #include "llvm/Target/Machine.h"
#include <stack> #include <stack>
typedef vector<unsigned int> ReservedColorListType; typedef vector<unsigned int> ReservedColorListType;

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@ -8,7 +8,7 @@
#ifndef SPARC_INTERNALS_H #ifndef SPARC_INTERNALS_H
#define SPARC_INTERNALS_H #define SPARC_INTERNALS_H
#include "llvm/CodeGen/TargetMachine.h" #include "llvm/Target/Machine.h"
#include "SparcRegInfo.h" #include "SparcRegInfo.h"
#include <sys/types.h> #include <sys/types.h>

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@ -4,19 +4,17 @@
Purpose: Contains the description of integer register class of Sparc Purpose: Contains the description of integer register class of Sparc
*/ */
#ifndef SPARC_INT_REG_CLASS_H #ifndef SPARC_INT_REG_CLASS_H
#define SPARC_INT_REG_CLASS_H #define SPARC_INT_REG_CLASS_H
#include "llvm/CodeGen/TargetMachine.h" #include "llvm/Target/Machine.h"
//----------------------------------------------------------------------------- //-----------------------------------------------------------------------------
// Integer Register Class // Integer Register Class
//----------------------------------------------------------------------------- //-----------------------------------------------------------------------------
// Int register names in same order as enum in class SparcIntRegOrder // Int register names in same order as enum in class SparcIntRegOrder
//
static string const IntRegNames[] = static string const IntRegNames[] =
{ "g1", "g2", "g3", "g4", "g5", "g6", "g7", { "g1", "g2", "g3", "g4", "g5", "g6", "g7",
"o0", "o1", "o2", "o3", "o4", "o5", "o7", "o0", "o1", "o2", "o3", "o4", "o5", "o7",

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@ -10,7 +10,7 @@
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
#include "llvm/CodeGen/TargetData.h" #include "llvm/Target/Data.h"
#include "llvm/DerivedTypes.h" #include "llvm/DerivedTypes.h"
#include "llvm/ConstPoolVals.h" #include "llvm/ConstPoolVals.h"

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@ -1,23 +1,12 @@
// $Id$ //===-- TargetMachine.cpp - General Target Information ---------------------==//
//*************************************************************************** //
// File: // This file describes the general parts of a Target machine.
// TargetMachine.cpp //
// //===----------------------------------------------------------------------===//
// Purpose:
//
// History:
// 7/12/01 - Vikram Adve - Created
//**************************************************************************/
#include "llvm/Target/Machine.h"
//*************************** User Include Files ***************************/
#include "llvm/CodeGen/TargetMachine.h"
#include "llvm/DerivedTypes.h" #include "llvm/DerivedTypes.h"
//************************ Exported Constants ******************************/
// External object describing the machine instructions // External object describing the machine instructions
// Initialized only when the TargetMachine class is created // Initialized only when the TargetMachine class is created
// and reset when that class is destroyed. // and reset when that class is destroyed.
@ -26,17 +15,12 @@ const MachineInstrDescriptor* TargetInstrDescriptors = NULL;
resourceId_t MachineResource::nextId = 0; resourceId_t MachineResource::nextId = 0;
//************************* Forward Declarations **************************/
static cycles_t ComputeMinGap (const InstrRUsage& fromRU, static cycles_t ComputeMinGap (const InstrRUsage& fromRU,
const InstrRUsage& toRU); const InstrRUsage& toRU);
static bool RUConflict (const vector<resourceId_t>& fromRVec, static bool RUConflict (const vector<resourceId_t>& fromRVec,
const vector<resourceId_t>& fromRVec); const vector<resourceId_t>& fromRVec);
//************************ Class Implementations **************************/
//--------------------------------------------------------------------------- //---------------------------------------------------------------------------
// class TargetMachine // class TargetMachine
// //

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@ -1,14 +1,13 @@
//===------------------------------------------------------------------------=== //===-- llc.cpp - Implement the LLVM Compiler -----------------------------===//
// LLVM 'LLC' UTILITY
// //
// This is the llc compiler driver. // This is the llc compiler driver.
// //
//===------------------------------------------------------------------------=== //===----------------------------------------------------------------------===//
#include "llvm/Bytecode/Reader.h" #include "llvm/Bytecode/Reader.h"
#include "llvm/Optimizations/Normalize.h" #include "llvm/Optimizations/Normalize.h"
#include "llvm/CodeGen/Sparc.h" #include "llvm/Target/Sparc.h"
#include "llvm/CodeGen/TargetMachine.h" #include "llvm/Target/Machine.h"
#include "llvm/Support/CommandLine.h" #include "llvm/Support/CommandLine.h"
#include "llvm/Module.h" #include "llvm/Module.h"
#include "llvm/Method.h" #include "llvm/Method.h"
@ -20,46 +19,39 @@ static void NormalizeMethod(Method* method) {
NormalizePhiConstantArgs(method); NormalizePhiConstantArgs(method);
} }
//===----------------------------------------------------------------------===//
static bool CompileModule(Module *M, TargetMachine &Target) {
for (Module::const_iterator MI = M->begin(), ME = M->end(); MI != ME; ++MI) {
Method *Meth = *MI;
NormalizeMethod(Meth);
if (Target.compileMethod(Meth)) return true;
}
return false;
}
//---------------------------------------------------------------------------
// Function main() // Function main()
//===----------------------------------------------------------------------===//
// //
// Entry point for the llc compiler. // Entry point for the llc compiler.
//--------------------------------------------------------------------------- //
int main(int argc, char** argv) { int main(int argc, char** argv) {
cl::ParseCommandLineOptions(argc, argv, " llvm system compiler\n"); cl::ParseCommandLineOptions(argc, argv, " llvm system compiler\n");
TargetMachine *Target = allocateSparcTargetMachine(); TargetMachine *Target = allocateSparcTargetMachine();
Module *module = ParseBytecodeFile(InputFilename); Module *M = ParseBytecodeFile(InputFilename);
if (module == 0) { if (M == 0) {
cerr << "bytecode didn't read correctly.\n"; cerr << "bytecode didn't read correctly.\n";
delete Target;
return 1; return 1;
} }
if (CompileModule(module, *Target)) { bool Failed = false;
cerr << "Error compiling " << InputFilename << "!\n"; for (Module::const_iterator MI = M->begin(), ME = M->end(); MI != ME; ++MI) {
delete module; Method *Meth = *MI;
return 1;
NormalizeMethod(Meth);
if (Target->compileMethod(Meth)) {
cerr << "Error compiling " << InputFilename << "!\n";
Failed = true;
break;
}
} }
// Clean up and exit // Clean up and exit
delete module; delete M;
delete Target; delete Target;
return 0; return Failed;
} }