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For expression like

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"APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth)",
to handle ShiftAmt == BitWidth situation, use zextOrCopy() instead of
zext().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35080 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Zhou Sheng 2007-03-13 06:40:59 +00:00
parent b991dfeae7
commit b277b16593
1 changed files with 3 additions and 3 deletions
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6
lib/Transforms/Scalar/InstructionCombining.cpp
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@ -1995,7 +1995,7 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
RHSKnownZero <<= ShiftAmt;
RHSKnownOne <<= ShiftAmt;
// low bits known zero.
RHSKnownZero |= APInt::getAllOnesValue(ShiftAmt).zext(BitWidth);
RHSKnownZero |= APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth);
}
break;
case Instruction::LShr:
@ -2012,7 +2012,7 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
assert((RHSKnownZero & RHSKnownOne) == 0 &&
"Bits known to be one AND zero?");
// Compute the new bits that are at the top now.
APInt HighBits(APInt::getAllOnesValue(ShiftAmt).zext(BitWidth).shl(
APInt HighBits(APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth).shl(
BitWidth - ShiftAmt));
RHSKnownZero &= TypeMask;
RHSKnownOne &= TypeMask;
@ -2046,7 +2046,7 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
assert((RHSKnownZero & RHSKnownOne) == 0 &&
"Bits known to be one AND zero?");
// Compute the new bits that are at the top now.
APInt HighBits(APInt::getAllOnesValue(ShiftAmt).zext(BitWidth).shl(
APInt HighBits(APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth).shl(
BitWidth - ShiftAmt));
RHSKnownZero &= TypeMask;
RHSKnownOne &= TypeMask;