From b2e806eecd85c98367f038817e742ef183dd9f87 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Sun, 22 Oct 2006 23:00:53 +0000 Subject: [PATCH] Fix phi node updating for switches lowered to linear sequences of branches. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31125 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index b5ec0ccc9e1..9786d2b3e9b 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -930,7 +930,7 @@ void SelectionDAGLowering::visitSwitch(SwitchInst &I) { // If the switch has few cases (two or less) emit a series of specific // tests. - if (0 && Cases.size() < 3) { + if (Cases.size() < 3) { // TODO: If any two of the cases has the same destination, and if one value // is the same as the other, but has one bit unset that the other has set, // use bit manipulation to do two compares at once. For example: @@ -3689,6 +3689,18 @@ void SelectionDAGISel::SelectBasicBlock(BasicBlock *LLVMBB, MachineFunction &MF, return; } + // If the switch block involved a branch to one of the actual successors, we + // need to update PHI nodes in that block. + for (unsigned i = 0, e = PHINodesToUpdate.size(); i != e; ++i) { + MachineInstr *PHI = PHINodesToUpdate[i].first; + assert(PHI->getOpcode() == TargetInstrInfo::PHI && + "This is not a machine PHI node that we are updating!"); + if (BB->isSuccessor(PHI->getParent())) { + PHI->addRegOperand(PHINodesToUpdate[i].second, false); + PHI->addMachineBasicBlockOperand(BB); + } + } + // If we generated any switch lowering information, build and codegen any // additional DAGs necessary. for (unsigned i = 0, e = SwitchCases.size(); i != e; ++i) {