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Rewrite aesimc handling. It only takes a single input and has a single

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dest.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100252 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher
2010-04-02 23:48:33 +00:00
parent a70261550e
commit b3500fd2f3
2 changed files with 15 additions and 7 deletions
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2
include/llvm/IntrinsicsX86.td
View File

@ -782,7 +782,7 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
// Advanced Encryption Standard (AES) Instructions // Advanced Encryption Standard (AES) Instructions
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_aesni_aesimc : GCCBuiltin<"__builtin_ia32_aesimc128">, def int_x86_aesni_aesimc : GCCBuiltin<"__builtin_ia32_aesimc128">,
Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty], Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty],
[IntrNoMem]>; [IntrNoMem]>;
def int_x86_aesni_aesenc : GCCBuiltin<"__builtin_ia32_aesenc128">, def int_x86_aesni_aesenc : GCCBuiltin<"__builtin_ia32_aesenc128">,
Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty], Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],

20
lib/Target/X86/X86InstrSSE.td
View File

@ -4033,8 +4033,6 @@ let Constraints = "$src1 = $dst" in {
} }
} }
defm AESIMC : AESI_binop_rm_int<0xDB, "aesimc",
int_x86_aesni_aesimc>;
defm AESENC : AESI_binop_rm_int<0xDC, "aesenc", defm AESENC : AESI_binop_rm_int<0xDC, "aesenc",
int_x86_aesni_aesenc>; int_x86_aesni_aesenc>;
defm AESENCLAST : AESI_binop_rm_int<0xDD, "aesenclast", defm AESENCLAST : AESI_binop_rm_int<0xDD, "aesenclast",
@ -4044,10 +4042,6 @@ defm AESDEC : AESI_binop_rm_int<0xDE, "aesdec",
defm AESDECLAST : AESI_binop_rm_int<0xDF, "aesdeclast", defm AESDECLAST : AESI_binop_rm_int<0xDF, "aesdeclast",
int_x86_aesni_aesdeclast>; int_x86_aesni_aesdeclast>;
def : Pat<(v2i64 (int_x86_aesni_aesimc VR128:$src1, VR128:$src2)),
(AESIMCrr VR128:$src1, VR128:$src2)>;
def : Pat<(v2i64 (int_x86_aesni_aesimc VR128:$src1, (memop addr:$src2))),
(AESIMCrm VR128:$src1, addr:$src2)>;
def : Pat<(v2i64 (int_x86_aesni_aesenc VR128:$src1, VR128:$src2)), def : Pat<(v2i64 (int_x86_aesni_aesenc VR128:$src1, VR128:$src2)),
(AESENCrr VR128:$src1, VR128:$src2)>; (AESENCrr VR128:$src1, VR128:$src2)>;
def : Pat<(v2i64 (int_x86_aesni_aesenc VR128:$src1, (memop addr:$src2))), def : Pat<(v2i64 (int_x86_aesni_aesenc VR128:$src1, (memop addr:$src2))),
@ -4065,6 +4059,20 @@ def : Pat<(v2i64 (int_x86_aesni_aesdeclast VR128:$src1, VR128:$src2)),
def : Pat<(v2i64 (int_x86_aesni_aesdeclast VR128:$src1, (memop addr:$src2))), def : Pat<(v2i64 (int_x86_aesni_aesdeclast VR128:$src1, (memop addr:$src2))),
(AESDECLASTrm VR128:$src1, addr:$src2)>; (AESDECLASTrm VR128:$src1, addr:$src2)>;
def AESIMCrr : AES8I<0xDB, MRMSrcReg, (outs VR128:$dst),
(ins VR128:$src1),
"aesimc\t{$src1, $dst|$dst, $src1}",
[(set VR128:$dst,
(int_x86_aesni_aesimc VR128:$src1))]>,
OpSize;
def AESIMCrm : AES8I<0xDB, MRMSrcMem, (outs VR128:$dst),
(ins i128mem:$src1),
"aesimc\t{$src1, $dst|$dst, $src1}",
[(set VR128:$dst,
(int_x86_aesni_aesimc (bitconvert (memopv2i64 addr:$src1))))]>,
OpSize;
def AESKEYGENASSIST128rr : AESAI<0xDF, MRMSrcReg, (outs VR128:$dst), def AESKEYGENASSIST128rr : AESAI<0xDF, MRMSrcReg, (outs VR128:$dst),
(ins VR128:$src1, i32i8imm:$src2), (ins VR128:$src1, i32i8imm:$src2),
"aeskeygenassist\t{$src2, $src1, $dst|$dst, $src1, $src2}", "aeskeygenassist\t{$src2, $src1, $dst|$dst, $src1, $src2}",