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ARM64: add patterns for scalar sqdmlal & sqdmlsl.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205207 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2014-03-31 15:46:38 +00:00
parent 9542846832
commit b35ffdff16
2 changed files with 25 additions and 0 deletions
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9
lib/Target/ARM64/ARM64InstrInfo.td
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@ -2525,6 +2525,15 @@ defm SQDMULL : SIMDThreeScalarMixedHS<0, 0b11010, "sqdmull",
defm SQDMLAL : SIMDThreeScalarMixedTiedHS<0, 0b10010, "sqdmlal">;
defm SQDMLSL : SIMDThreeScalarMixedTiedHS<0, 0b10110, "sqdmlsl">;
def : Pat<(i64 (int_arm64_neon_sqadd (i64 FPR64:$Rd),
(i64 (int_arm64_neon_sqdmulls_scalar (i32 FPR32:$Rn),
(i32 FPR32:$Rm))))),
(SQDMLALi32 FPR64:$Rd, FPR32:$Rn, FPR32:$Rm)>;
def : Pat<(i64 (int_arm64_neon_sqsub (i64 FPR64:$Rd),
(i64 (int_arm64_neon_sqdmulls_scalar (i32 FPR32:$Rn),
(i32 FPR32:$Rm))))),
(SQDMLSLi32 FPR64:$Rd, FPR32:$Rn, FPR32:$Rm)>;
//===----------------------------------------------------------------------===//
// Advanced SIMD two scalar instructions.
//===----------------------------------------------------------------------===//

16
test/CodeGen/ARM64/vmul.ll
View File

@ -1967,3 +1967,19 @@ define <1 x double> @test_fdiv_v1f64(<1 x double> %L, <1 x double> %R) nounwind
%prod = fdiv <1 x double> %L, %R
ret <1 x double> %prod
}
define i64 @sqdmlal_d(i32 %A, i32 %B, i64 %C) nounwind {
;CHECK-LABEL: sqdmlal_d:
;CHECK: sqdmlal
%tmp4 = call i64 @llvm.arm64.neon.sqdmulls.scalar(i32 %A, i32 %B)
%tmp5 = call i64 @llvm.arm64.neon.sqadd.i64(i64 %C, i64 %tmp4)
ret i64 %tmp5
}
define i64 @sqdmlsl_d(i32 %A, i32 %B, i64 %C) nounwind {
;CHECK-LABEL: sqdmlsl_d:
;CHECK: sqdmlsl
%tmp4 = call i64 @llvm.arm64.neon.sqdmulls.scalar(i32 %A, i32 %B)
%tmp5 = call i64 @llvm.arm64.neon.sqsub.i64(i64 %C, i64 %tmp4)
ret i64 %tmp5
}