mirror of
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synced 2024-08-19 04:29:21 +00:00
Refactor X86AsmPrinter.cpp into multiple files. Patch contributed
by Aaron Gray, cleaned up by me. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22324 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
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171
lib/Target/X86/X86ATTAsmPrinter.cpp
Executable file
171
lib/Target/X86/X86ATTAsmPrinter.cpp
Executable file
@ -0,0 +1,171 @@
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//===-- X86ATTAsmPrinter.cpp - Convert X86 LLVM code to Intel assembly ----===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to AT&T format assembly
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// language. This printer is the output mechanism used by `llc'.
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//
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//===----------------------------------------------------------------------===//
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#include "X86ATTAsmPrinter.h"
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#include "X86.h"
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#include "X86TargetMachine.h"
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#include "llvm/Module.h"
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#include "llvm/Support/Mangler.h"
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using namespace llvm;
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using namespace x86;
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/// runOnMachineFunction - This uses the printMachineInstruction()
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/// method to print assembly for each instruction.
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///
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bool X86ATTAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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setupMachineFunction(MF);
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O << "\n\n";
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// Print out constants referenced by the function
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printConstantPool(MF.getConstantPool());
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// Print out labels for the function.
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O << "\t.text\n";
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emitAlignment(4);
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O << "\t.globl\t" << CurrentFnName << "\n";
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if (!forCygwin && !forDarwin)
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O << "\t.type\t" << CurrentFnName << ", @function\n";
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O << CurrentFnName << ":\n";
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// Print out code for the function.
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for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
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I != E; ++I) {
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// Print a label for the basic block.
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if (I->pred_begin() != I->pred_end())
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O << ".LBB" << CurrentFnName << "_" << I->getNumber() << ":\t"
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<< CommentString << " " << I->getBasicBlock()->getName() << "\n";
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for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
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II != E; ++II) {
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// Print the assembly for the instruction.
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O << "\t";
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printMachineInstruction(II);
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}
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}
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// We didn't modify anything.
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return false;
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}
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void X86ATTAsmPrinter::printOp(const MachineOperand &MO, bool isCallOp) {
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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switch (MO.getType()) {
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case MachineOperand::MO_VirtualRegister:
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case MachineOperand::MO_MachineRegister:
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assert(MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
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"Virtual registers should not make it this far!");
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O << '%';
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for (const char *Name = RI.get(MO.getReg()).Name; *Name; ++Name)
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O << (char)tolower(*Name);
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return;
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case MachineOperand::MO_SignExtendedImmed:
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case MachineOperand::MO_UnextendedImmed:
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O << '$' << (int)MO.getImmedValue();
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return;
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case MachineOperand::MO_MachineBasicBlock: {
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MachineBasicBlock *MBBOp = MO.getMachineBasicBlock();
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O << ".LBB" << Mang->getValueName(MBBOp->getParent()->getFunction())
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<< "_" << MBBOp->getNumber () << "\t# "
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<< MBBOp->getBasicBlock ()->getName ();
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return;
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}
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case MachineOperand::MO_PCRelativeDisp:
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std::cerr << "Shouldn't use addPCDisp() when building X86 MachineInstrs";
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abort ();
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return;
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case MachineOperand::MO_GlobalAddress: {
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if (!isCallOp) O << '$';
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O << Mang->getValueName(MO.getGlobal());
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int Offset = MO.getOffset();
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if (Offset > 0)
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O << "+" << Offset;
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else if (Offset < 0)
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O << Offset;
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return;
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}
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case MachineOperand::MO_ExternalSymbol:
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if (!isCallOp) O << '$';
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O << GlobalPrefix << MO.getSymbolName();
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return;
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default:
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O << "<unknown operand type>"; return;
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}
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}
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void X86ATTAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op){
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assert(isMem(MI, Op) && "Invalid memory reference!");
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const MachineOperand &BaseReg = MI->getOperand(Op);
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int ScaleVal = MI->getOperand(Op+1).getImmedValue();
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const MachineOperand &IndexReg = MI->getOperand(Op+2);
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const MachineOperand &DispSpec = MI->getOperand(Op+3);
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if (BaseReg.isFrameIndex()) {
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O << "[frame slot #" << BaseReg.getFrameIndex();
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if (DispSpec.getImmedValue())
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O << " + " << DispSpec.getImmedValue();
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O << "]";
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return;
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} else if (BaseReg.isConstantPoolIndex()) {
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O << ".CPI" << CurrentFnName << "_"
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<< BaseReg.getConstantPoolIndex();
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if (DispSpec.getImmedValue())
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O << "+" << DispSpec.getImmedValue();
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if (IndexReg.getReg()) {
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O << "(,";
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printOp(IndexReg);
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if (ScaleVal != 1)
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O << "," << ScaleVal;
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O << ")";
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}
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return;
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}
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if (DispSpec.isGlobalAddress()) {
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printOp(DispSpec, true);
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} else {
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int DispVal = DispSpec.getImmedValue();
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if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
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O << DispVal;
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}
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if (IndexReg.getReg() || BaseReg.getReg()) {
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O << "(";
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if (BaseReg.getReg())
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printOp(BaseReg);
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if (IndexReg.getReg()) {
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O << ",";
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printOp(IndexReg);
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if (ScaleVal != 1)
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O << "," << ScaleVal;
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}
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O << ")";
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}
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}
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/// printMachineInstruction -- Print out a single X86 LLVM instruction
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/// MI in Intel syntax to the current output stream.
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///
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void X86ATTAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
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++EmittedInsts;
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// Call the autogenerated instruction printer routines.
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printInstruction(MI);
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}
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// Include the auto-generated portion of the assembly writer.
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#include "X86GenAsmWriter.inc"
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61
lib/Target/X86/X86ATTAsmPrinter.h
Executable file
61
lib/Target/X86/X86ATTAsmPrinter.h
Executable file
@ -0,0 +1,61 @@
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//===-- X86ATTAsmPrinter.h - Convert X86 LLVM code to Intel assembly ------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// AT&T assembly code printer class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef X86ATTASMPRINTER_H
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#define X86ATTASMPRINTER_H
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#include "X86AsmPrinter.h"
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#include "llvm/CodeGen/ValueTypes.h"
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namespace llvm {
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namespace x86 {
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struct X86ATTAsmPrinter : public X86SharedAsmPrinter {
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X86ATTAsmPrinter(std::ostream &O, TargetMachine &TM)
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: X86SharedAsmPrinter(O, TM) { }
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virtual const char *getPassName() const {
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return "X86 AT&T-Style Assembly Printer";
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}
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/// printInstruction - This method is automatically generated by tablegen
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/// from the instruction set description. This method returns true if the
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/// machine instruction was sufficiently described to print it, otherwise it
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/// returns false.
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bool printInstruction(const MachineInstr *MI);
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// This method is used by the tablegen'erated instruction printer.
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void printOperand(const MachineInstr *MI, unsigned OpNo, MVT::ValueType VT){
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printOp(MI->getOperand(OpNo));
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}
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void printCallOperand(const MachineInstr *MI, unsigned OpNo,
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MVT::ValueType VT) {
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printOp(MI->getOperand(OpNo), true); // Don't print '$' prefix.
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}
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void printMemoryOperand(const MachineInstr *MI, unsigned OpNo,
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MVT::ValueType VT) {
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printMemReference(MI, OpNo);
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}
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void printMachineInstruction(const MachineInstr *MI);
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void printOp(const MachineOperand &MO, bool isCallOperand = false);
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void printMemReference(const MachineInstr *MI, unsigned Op);
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bool runOnMachineFunction(MachineFunction &F);
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};
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} // end namespace x86
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} // end namespace llvm
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#endif
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@ -1,4 +1,4 @@
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//===-- X86AsmPrinter.cpp - Convert X86 LLVM code to Intel assembly -------===//
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//===-- X86AsmPrinter.cpp - Convert X86 LLVM IR to X86 assembly -----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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@ -7,98 +7,62 @@
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to Intel and AT&T format assembly
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// language. This printer is the output mechanism used by `llc' and `lli
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// -print-machineinstrs' on X86.
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// This file the shared super class printer that converts from our internal
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// representation of machine-dependent LLVM code to Intel and AT&T format
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// assembly language.
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// This printer is the output mechanism used by `llc'.
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//
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//===----------------------------------------------------------------------===//
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#include "X86ATTAsmPrinter.h"
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#include "X86IntelAsmPrinter.h"
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#include "X86.h"
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#include "X86TargetMachine.h"
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#include "llvm/Module.h"
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#include "llvm/Type.h"
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#include "llvm/Assembly/Writer.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/ValueTypes.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Support/Mangler.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/Support/CommandLine.h"
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using namespace llvm;
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using namespace x86;
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namespace {
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Statistic<> EmittedInsts("asm-printer", "Number of machine instrs printed");
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enum AsmWriterFlavor { att, intel };
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Statistic<> EmittedInsts("asm-printer", "Number of machine instrs printed");
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cl::opt<AsmWriterFlavor>
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AsmWriterFlavor("x86-asm-syntax",
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cl::desc("Choose style of code to emit from X86 backend:"),
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cl::values(
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clEnumVal(att, " Emit AT&T-style assembly"),
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clEnumVal(intel, " Emit Intel-style assembly"),
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clEnumValEnd),
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cl::init(att));
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enum AsmWriterFlavorTy { att, intel };
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cl::opt<AsmWriterFlavorTy>
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AsmWriterFlavor("x86-asm-syntax",
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cl::desc("Choose style of code to emit from X86 backend:"),
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cl::values(
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clEnumVal(att, " Emit AT&T-style assembly"),
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clEnumVal(intel, " Emit Intel-style assembly"),
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clEnumValEnd),
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cl::init(att));
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struct X86SharedAsmPrinter : public AsmPrinter {
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X86SharedAsmPrinter(std::ostream &O, TargetMachine &TM)
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: AsmPrinter(O, TM), forCygwin(false), forDarwin(false) { }
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bool doInitialization(Module &M);
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void printConstantPool(MachineConstantPool *MCP);
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bool doFinalization(Module &M);
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bool forCygwin;
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bool forDarwin;
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};
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}
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static bool isScale(const MachineOperand &MO) {
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return MO.isImmediate() &&
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(MO.getImmedValue() == 1 || MO.getImmedValue() == 2 ||
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MO.getImmedValue() == 4 || MO.getImmedValue() == 8);
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}
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static bool isMem(const MachineInstr *MI, unsigned Op) {
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if (MI->getOperand(Op).isFrameIndex()) return true;
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if (MI->getOperand(Op).isConstantPoolIndex()) return true;
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return Op+4 <= MI->getNumOperands() &&
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MI->getOperand(Op ).isRegister() && isScale(MI->getOperand(Op+1)) &&
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MI->getOperand(Op+2).isRegister() && (MI->getOperand(Op+3).isImmediate() ||
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MI->getOperand(Op+3).isGlobalAddress());
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}
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// SwitchSection - Switch to the specified section of the executable if we are
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// not already in it!
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//
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static void SwitchSection(std::ostream &OS, std::string &CurSection,
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const char *NewSection) {
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if (CurSection != NewSection) {
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CurSection = NewSection;
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if (!CurSection.empty())
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OS << "\t" << NewSection << "\n";
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}
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}
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/// doInitialization - determine
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/// doInitialization
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bool X86SharedAsmPrinter::doInitialization(Module& M) {
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bool leadingUnderscore = false;
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forCygwin = false;
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const std::string& TT = M.getTargetTriple();
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if (TT.length() > 5) {
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forCygwin = TT.find("cygwin") != std::string::npos ||
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TT.find("mingw") != std::string::npos;
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forDarwin = TT.find("darwin") != std::string::npos;
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} else if (TT.empty()) {
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#if defined(__CYGWIN__) || defined(__MINGW32__)
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#if defined(__CYGWIN__) || defined(__MINGW32__)
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forCygwin = true;
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#elif defined(__MACOSX__)
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#elif defined(__MACOSX__)
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forDarwin = true;
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#endif
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#elif defined(_WIN32)
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leadingUnderscore = true;
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#else
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leadingUnderscore = false;
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#endif
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}
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if (forCygwin || forDarwin)
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if (leadingUnderscore || forCygwin || forDarwin)
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GlobalPrefix = "_";
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if (forDarwin)
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AlignmentIsInBytes = false;
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return AsmPrinter::doInitialization(M);
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}
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@ -128,502 +92,70 @@ bool X86SharedAsmPrinter::doFinalization(Module &M) {
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// Print out module-level global variables here.
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for (Module::const_global_iterator I = M.global_begin(), E = M.global_end(); I != E; ++I)
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if (I->hasInitializer()) { // External global require no code
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O << "\n\n";
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std::string name = Mang->getValueName(I);
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Constant *C = I->getInitializer();
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unsigned Size = TD.getTypeSize(C->getType());
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unsigned Align = TD.getTypeAlignmentShift(C->getType());
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if (I->hasInitializer()) { // External global require no code
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O << "\n\n";
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std::string name = Mang->getValueName(I);
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Constant *C = I->getInitializer();
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unsigned Size = TD.getTypeSize(C->getType());
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unsigned Align = TD.getTypeAlignmentShift(C->getType());
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if (C->isNullValue() &&
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(I->hasLinkOnceLinkage() || I->hasInternalLinkage() ||
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I->hasWeakLinkage() /* FIXME: Verify correct */)) {
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SwitchSection(O, CurSection, ".data");
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if (!forCygwin && I->hasInternalLinkage())
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O << "\t.local " << name << "\n";
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if (C->isNullValue() &&
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(I->hasLinkOnceLinkage() || I->hasInternalLinkage() ||
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I->hasWeakLinkage() /* FIXME: Verify correct */)) {
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SwitchSection(O, CurSection, ".data");
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if (!forCygwin && I->hasInternalLinkage())
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O << "\t.local " << name << "\n";
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O << "\t.comm " << name << "," << TD.getTypeSize(C->getType());
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if (!forCygwin)
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O << "," << (1 << Align);
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O << "\t\t# ";
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WriteAsOperand(O, I, true, true, &M);
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O << "\n";
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} else {
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switch (I->getLinkage()) {
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case GlobalValue::LinkOnceLinkage:
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case GlobalValue::WeakLinkage: // FIXME: Verify correct for weak.
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// Nonnull linkonce -> weak
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O << "\t.weak " << name << "\n";
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SwitchSection(O, CurSection, "");
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O << "\t.section\t.llvm.linkonce.d." << name << ",\"aw\",@progbits\n";
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break;
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case GlobalValue::AppendingLinkage:
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// FIXME: appending linkage variables should go into a section of
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// their name or something. For now, just emit them as external.
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case GlobalValue::ExternalLinkage:
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// If external or appending, declare as a global symbol
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O << "\t.globl " << name << "\n";
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// FALL THROUGH
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case GlobalValue::InternalLinkage:
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if (C->isNullValue())
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SwitchSection(O, CurSection, ".bss");
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else
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SwitchSection(O, CurSection, ".data");
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break;
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case GlobalValue::GhostLinkage:
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std::cerr << "GhostLinkage cannot appear in X86AsmPrinter!\n";
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abort();
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}
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O << "\t.comm " << name << "," << TD.getTypeSize(C->getType());
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if (!forCygwin)
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O << "," << (1 << Align);
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O << "\t\t# ";
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WriteAsOperand(O, I, true, true, &M);
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O << "\n";
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} else {
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switch (I->getLinkage()) {
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case GlobalValue::LinkOnceLinkage:
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case GlobalValue::WeakLinkage: // FIXME: Verify correct for weak.
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// Nonnull linkonce -> weak
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O << "\t.weak " << name << "\n";
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SwitchSection(O, CurSection, "");
|
||||
O << "\t.section\t.llvm.linkonce.d." << name << ",\"aw\",@progbits\n";
|
||||
break;
|
||||
case GlobalValue::AppendingLinkage:
|
||||
// FIXME: appending linkage variables should go into a section of
|
||||
// their name or something. For now, just emit them as external.
|
||||
case GlobalValue::ExternalLinkage:
|
||||
// If external or appending, declare as a global symbol
|
||||
O << "\t.globl " << name << "\n";
|
||||
// FALL THROUGH
|
||||
case GlobalValue::InternalLinkage:
|
||||
if (C->isNullValue())
|
||||
SwitchSection(O, CurSection, ".bss");
|
||||
else
|
||||
SwitchSection(O, CurSection, ".data");
|
||||
break;
|
||||
case GlobalValue::GhostLinkage:
|
||||
std::cerr << "GhostLinkage cannot appear in X86AsmPrinter!\n";
|
||||
abort();
|
||||
}
|
||||
|
||||
emitAlignment(Align);
|
||||
if (!forCygwin && !forDarwin) {
|
||||
O << "\t.type " << name << ",@object\n";
|
||||
O << "\t.size " << name << "," << Size << "\n";
|
||||
}
|
||||
O << name << ":\t\t\t\t# ";
|
||||
WriteAsOperand(O, I, true, true, &M);
|
||||
O << " = ";
|
||||
WriteAsOperand(O, C, false, false, &M);
|
||||
O << "\n";
|
||||
emitGlobalConstant(C);
|
||||
}
|
||||
emitAlignment(Align);
|
||||
if (!forCygwin && !forDarwin) {
|
||||
O << "\t.type " << name << ",@object\n";
|
||||
O << "\t.size " << name << "," << Size << "\n";
|
||||
}
|
||||
O << name << ":\t\t\t\t# ";
|
||||
WriteAsOperand(O, I, true, true, &M);
|
||||
O << " = ";
|
||||
WriteAsOperand(O, C, false, false, &M);
|
||||
O << "\n";
|
||||
emitGlobalConstant(C);
|
||||
}
|
||||
}
|
||||
|
||||
AsmPrinter::doFinalization(M);
|
||||
return false; // success
|
||||
}
|
||||
|
||||
namespace {
|
||||
struct X86IntelAsmPrinter : public X86SharedAsmPrinter {
|
||||
X86IntelAsmPrinter(std::ostream &O, TargetMachine &TM)
|
||||
: X86SharedAsmPrinter(O, TM) { }
|
||||
|
||||
virtual const char *getPassName() const {
|
||||
return "X86 Intel-Style Assembly Printer";
|
||||
}
|
||||
|
||||
/// printInstruction - This method is automatically generated by tablegen
|
||||
/// from the instruction set description. This method returns true if the
|
||||
/// machine instruction was sufficiently described to print it, otherwise it
|
||||
/// returns false.
|
||||
bool printInstruction(const MachineInstr *MI);
|
||||
|
||||
// This method is used by the tablegen'erated instruction printer.
|
||||
void printOperand(const MachineInstr *MI, unsigned OpNo, MVT::ValueType VT){
|
||||
const MachineOperand &MO = MI->getOperand(OpNo);
|
||||
if (MO.getType() == MachineOperand::MO_MachineRegister) {
|
||||
assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physref??");
|
||||
// Bug Workaround: See note in Printer::doInitialization about %.
|
||||
O << "%" << TM.getRegisterInfo()->get(MO.getReg()).Name;
|
||||
} else {
|
||||
printOp(MO);
|
||||
}
|
||||
}
|
||||
|
||||
void printCallOperand(const MachineInstr *MI, unsigned OpNo,
|
||||
MVT::ValueType VT) {
|
||||
printOp(MI->getOperand(OpNo), true); // Don't print "OFFSET".
|
||||
}
|
||||
|
||||
void printMemoryOperand(const MachineInstr *MI, unsigned OpNo,
|
||||
MVT::ValueType VT) {
|
||||
switch (VT) {
|
||||
default: assert(0 && "Unknown arg size!");
|
||||
case MVT::i8: O << "BYTE PTR "; break;
|
||||
case MVT::i16: O << "WORD PTR "; break;
|
||||
case MVT::i32:
|
||||
case MVT::f32: O << "DWORD PTR "; break;
|
||||
case MVT::i64:
|
||||
case MVT::f64: O << "QWORD PTR "; break;
|
||||
case MVT::f80: O << "XWORD PTR "; break;
|
||||
}
|
||||
printMemReference(MI, OpNo);
|
||||
}
|
||||
|
||||
void printMachineInstruction(const MachineInstr *MI);
|
||||
void printOp(const MachineOperand &MO, bool elideOffsetKeyword = false);
|
||||
void printMemReference(const MachineInstr *MI, unsigned Op);
|
||||
bool runOnMachineFunction(MachineFunction &F);
|
||||
bool doInitialization(Module &M);
|
||||
};
|
||||
} // end of anonymous namespace
|
||||
|
||||
|
||||
// Include the auto-generated portion of the assembly writer.
|
||||
#include "X86GenAsmWriter1.inc"
|
||||
|
||||
|
||||
/// runOnMachineFunction - This uses the printMachineInstruction()
|
||||
/// method to print assembly for each instruction.
|
||||
///
|
||||
bool X86IntelAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
|
||||
setupMachineFunction(MF);
|
||||
O << "\n\n";
|
||||
|
||||
// Print out constants referenced by the function
|
||||
printConstantPool(MF.getConstantPool());
|
||||
|
||||
// Print out labels for the function.
|
||||
O << "\t.text\n";
|
||||
emitAlignment(4);
|
||||
O << "\t.globl\t" << CurrentFnName << "\n";
|
||||
if (!forCygwin && !forDarwin)
|
||||
O << "\t.type\t" << CurrentFnName << ", @function\n";
|
||||
O << CurrentFnName << ":\n";
|
||||
|
||||
// Print out code for the function.
|
||||
for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
|
||||
I != E; ++I) {
|
||||
// Print a label for the basic block if there are any predecessors.
|
||||
if (I->pred_begin() != I->pred_end())
|
||||
O << ".LBB" << CurrentFnName << "_" << I->getNumber() << ":\t"
|
||||
<< CommentString << " " << I->getBasicBlock()->getName() << "\n";
|
||||
for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
|
||||
II != E; ++II) {
|
||||
// Print the assembly for the instruction.
|
||||
O << "\t";
|
||||
printMachineInstruction(II);
|
||||
}
|
||||
}
|
||||
|
||||
// We didn't modify anything.
|
||||
return false;
|
||||
}
|
||||
|
||||
void X86IntelAsmPrinter::printOp(const MachineOperand &MO,
|
||||
bool elideOffsetKeyword /* = false */) {
|
||||
const MRegisterInfo &RI = *TM.getRegisterInfo();
|
||||
switch (MO.getType()) {
|
||||
case MachineOperand::MO_VirtualRegister:
|
||||
if (Value *V = MO.getVRegValueOrNull()) {
|
||||
O << "<" << V->getName() << ">";
|
||||
return;
|
||||
}
|
||||
// FALLTHROUGH
|
||||
case MachineOperand::MO_MachineRegister:
|
||||
if (MRegisterInfo::isPhysicalRegister(MO.getReg()))
|
||||
// Bug Workaround: See note in Printer::doInitialization about %.
|
||||
O << "%" << RI.get(MO.getReg()).Name;
|
||||
else
|
||||
O << "%reg" << MO.getReg();
|
||||
return;
|
||||
|
||||
case MachineOperand::MO_SignExtendedImmed:
|
||||
case MachineOperand::MO_UnextendedImmed:
|
||||
O << (int)MO.getImmedValue();
|
||||
return;
|
||||
case MachineOperand::MO_MachineBasicBlock: {
|
||||
MachineBasicBlock *MBBOp = MO.getMachineBasicBlock();
|
||||
O << ".LBB" << Mang->getValueName(MBBOp->getParent()->getFunction())
|
||||
<< "_" << MBBOp->getNumber () << '\t' << CommentString
|
||||
<< MBBOp->getBasicBlock ()->getName ();
|
||||
return;
|
||||
}
|
||||
case MachineOperand::MO_PCRelativeDisp:
|
||||
std::cerr << "Shouldn't use addPCDisp() when building X86 MachineInstrs";
|
||||
abort ();
|
||||
return;
|
||||
case MachineOperand::MO_GlobalAddress: {
|
||||
if (!elideOffsetKeyword)
|
||||
O << "OFFSET ";
|
||||
O << Mang->getValueName(MO.getGlobal());
|
||||
int Offset = MO.getOffset();
|
||||
if (Offset > 0)
|
||||
O << " + " << Offset;
|
||||
else if (Offset < 0)
|
||||
O << " - " << -Offset;
|
||||
return;
|
||||
}
|
||||
case MachineOperand::MO_ExternalSymbol:
|
||||
O << GlobalPrefix << MO.getSymbolName();
|
||||
return;
|
||||
default:
|
||||
O << "<unknown operand type>"; return;
|
||||
}
|
||||
}
|
||||
|
||||
void X86IntelAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op){
|
||||
assert(isMem(MI, Op) && "Invalid memory reference!");
|
||||
|
||||
const MachineOperand &BaseReg = MI->getOperand(Op);
|
||||
int ScaleVal = MI->getOperand(Op+1).getImmedValue();
|
||||
const MachineOperand &IndexReg = MI->getOperand(Op+2);
|
||||
const MachineOperand &DispSpec = MI->getOperand(Op+3);
|
||||
|
||||
if (BaseReg.isFrameIndex()) {
|
||||
O << "[frame slot #" << BaseReg.getFrameIndex();
|
||||
if (DispSpec.getImmedValue())
|
||||
O << " + " << DispSpec.getImmedValue();
|
||||
O << "]";
|
||||
return;
|
||||
} else if (BaseReg.isConstantPoolIndex()) {
|
||||
O << "[.CPI" << CurrentFnName << "_"
|
||||
<< BaseReg.getConstantPoolIndex();
|
||||
|
||||
if (IndexReg.getReg()) {
|
||||
O << " + ";
|
||||
if (ScaleVal != 1)
|
||||
O << ScaleVal << "*";
|
||||
printOp(IndexReg);
|
||||
}
|
||||
|
||||
if (DispSpec.getImmedValue())
|
||||
O << " + " << DispSpec.getImmedValue();
|
||||
O << "]";
|
||||
return;
|
||||
}
|
||||
|
||||
O << "[";
|
||||
bool NeedPlus = false;
|
||||
if (BaseReg.getReg()) {
|
||||
printOp(BaseReg, true);
|
||||
NeedPlus = true;
|
||||
}
|
||||
|
||||
if (IndexReg.getReg()) {
|
||||
if (NeedPlus) O << " + ";
|
||||
if (ScaleVal != 1)
|
||||
O << ScaleVal << "*";
|
||||
printOp(IndexReg);
|
||||
NeedPlus = true;
|
||||
}
|
||||
|
||||
if (DispSpec.isGlobalAddress()) {
|
||||
if (NeedPlus)
|
||||
O << " + ";
|
||||
printOp(DispSpec, true);
|
||||
} else {
|
||||
int DispVal = DispSpec.getImmedValue();
|
||||
if (DispVal || (!BaseReg.getReg() && !IndexReg.getReg())) {
|
||||
if (NeedPlus)
|
||||
if (DispVal > 0)
|
||||
O << " + ";
|
||||
else {
|
||||
O << " - ";
|
||||
DispVal = -DispVal;
|
||||
}
|
||||
O << DispVal;
|
||||
}
|
||||
}
|
||||
O << "]";
|
||||
}
|
||||
|
||||
|
||||
/// printMachineInstruction -- Print out a single X86 LLVM instruction
|
||||
/// MI in Intel syntax to the current output stream.
|
||||
///
|
||||
void X86IntelAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
|
||||
++EmittedInsts;
|
||||
|
||||
// Call the autogenerated instruction printer routines.
|
||||
printInstruction(MI);
|
||||
}
|
||||
|
||||
bool X86IntelAsmPrinter::doInitialization(Module &M) {
|
||||
AsmPrinter::doInitialization(M);
|
||||
// Tell gas we are outputting Intel syntax (not AT&T syntax) assembly.
|
||||
//
|
||||
// Bug: gas in `intel_syntax noprefix' mode interprets the symbol `Sp' in an
|
||||
// instruction as a reference to the register named sp, and if you try to
|
||||
// reference a symbol `Sp' (e.g. `mov ECX, OFFSET Sp') then it gets lowercased
|
||||
// before being looked up in the symbol table. This creates spurious
|
||||
// `undefined symbol' errors when linking. Workaround: Do not use `noprefix'
|
||||
// mode, and decorate all register names with percent signs.
|
||||
O << "\t.intel_syntax\n";
|
||||
return false;
|
||||
}
|
||||
|
||||
|
||||
|
||||
namespace {
|
||||
struct X86ATTAsmPrinter : public X86SharedAsmPrinter {
|
||||
X86ATTAsmPrinter(std::ostream &O, TargetMachine &TM)
|
||||
: X86SharedAsmPrinter(O, TM) { }
|
||||
|
||||
virtual const char *getPassName() const {
|
||||
return "X86 AT&T-Style Assembly Printer";
|
||||
}
|
||||
|
||||
/// printInstruction - This method is automatically generated by tablegen
|
||||
/// from the instruction set description. This method returns true if the
|
||||
/// machine instruction was sufficiently described to print it, otherwise it
|
||||
/// returns false.
|
||||
bool printInstruction(const MachineInstr *MI);
|
||||
|
||||
// This method is used by the tablegen'erated instruction printer.
|
||||
void printOperand(const MachineInstr *MI, unsigned OpNo, MVT::ValueType VT){
|
||||
printOp(MI->getOperand(OpNo));
|
||||
}
|
||||
|
||||
void printCallOperand(const MachineInstr *MI, unsigned OpNo,
|
||||
MVT::ValueType VT) {
|
||||
printOp(MI->getOperand(OpNo), true); // Don't print '$' prefix.
|
||||
}
|
||||
|
||||
void printMemoryOperand(const MachineInstr *MI, unsigned OpNo,
|
||||
MVT::ValueType VT) {
|
||||
printMemReference(MI, OpNo);
|
||||
}
|
||||
|
||||
void printMachineInstruction(const MachineInstr *MI);
|
||||
void printOp(const MachineOperand &MO, bool isCallOperand = false);
|
||||
void printMemReference(const MachineInstr *MI, unsigned Op);
|
||||
bool runOnMachineFunction(MachineFunction &F);
|
||||
};
|
||||
} // end of anonymous namespace
|
||||
|
||||
|
||||
// Include the auto-generated portion of the assembly writer.
|
||||
#include "X86GenAsmWriter.inc"
|
||||
|
||||
|
||||
/// runOnMachineFunction - This uses the printMachineInstruction()
|
||||
/// method to print assembly for each instruction.
|
||||
///
|
||||
bool X86ATTAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
|
||||
setupMachineFunction(MF);
|
||||
O << "\n\n";
|
||||
|
||||
// Print out constants referenced by the function
|
||||
printConstantPool(MF.getConstantPool());
|
||||
|
||||
// Print out labels for the function.
|
||||
O << "\t.text\n";
|
||||
emitAlignment(4);
|
||||
O << "\t.globl\t" << CurrentFnName << "\n";
|
||||
if (!forCygwin && !forDarwin)
|
||||
O << "\t.type\t" << CurrentFnName << ", @function\n";
|
||||
O << CurrentFnName << ":\n";
|
||||
|
||||
// Print out code for the function.
|
||||
for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
|
||||
I != E; ++I) {
|
||||
// Print a label for the basic block.
|
||||
if (I->pred_begin() != I->pred_end())
|
||||
O << ".LBB" << CurrentFnName << "_" << I->getNumber() << ":\t"
|
||||
<< CommentString << " " << I->getBasicBlock()->getName() << "\n";
|
||||
for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
|
||||
II != E; ++II) {
|
||||
// Print the assembly for the instruction.
|
||||
O << "\t";
|
||||
printMachineInstruction(II);
|
||||
}
|
||||
}
|
||||
|
||||
// We didn't modify anything.
|
||||
return false;
|
||||
}
|
||||
|
||||
void X86ATTAsmPrinter::printOp(const MachineOperand &MO, bool isCallOp) {
|
||||
const MRegisterInfo &RI = *TM.getRegisterInfo();
|
||||
switch (MO.getType()) {
|
||||
case MachineOperand::MO_VirtualRegister:
|
||||
case MachineOperand::MO_MachineRegister:
|
||||
assert(MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
|
||||
"Virtual registers should not make it this far!");
|
||||
O << '%';
|
||||
for (const char *Name = RI.get(MO.getReg()).Name; *Name; ++Name)
|
||||
O << (char)tolower(*Name);
|
||||
return;
|
||||
|
||||
case MachineOperand::MO_SignExtendedImmed:
|
||||
case MachineOperand::MO_UnextendedImmed:
|
||||
O << '$' << (int)MO.getImmedValue();
|
||||
return;
|
||||
case MachineOperand::MO_MachineBasicBlock: {
|
||||
MachineBasicBlock *MBBOp = MO.getMachineBasicBlock();
|
||||
O << ".LBB" << Mang->getValueName(MBBOp->getParent()->getFunction())
|
||||
<< "_" << MBBOp->getNumber () << '\t' << CommentString
|
||||
<< MBBOp->getBasicBlock ()->getName ();
|
||||
return;
|
||||
}
|
||||
case MachineOperand::MO_PCRelativeDisp:
|
||||
std::cerr << "Shouldn't use addPCDisp() when building X86 MachineInstrs";
|
||||
abort ();
|
||||
return;
|
||||
case MachineOperand::MO_GlobalAddress: {
|
||||
if (!isCallOp) O << '$';
|
||||
O << Mang->getValueName(MO.getGlobal());
|
||||
int Offset = MO.getOffset();
|
||||
if (Offset > 0)
|
||||
O << "+" << Offset;
|
||||
else if (Offset < 0)
|
||||
O << Offset;
|
||||
return;
|
||||
}
|
||||
case MachineOperand::MO_ExternalSymbol:
|
||||
if (!isCallOp) O << '$';
|
||||
O << GlobalPrefix << MO.getSymbolName();
|
||||
return;
|
||||
default:
|
||||
O << "<unknown operand type>"; return;
|
||||
}
|
||||
}
|
||||
|
||||
void X86ATTAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op){
|
||||
assert(isMem(MI, Op) && "Invalid memory reference!");
|
||||
|
||||
const MachineOperand &BaseReg = MI->getOperand(Op);
|
||||
int ScaleVal = MI->getOperand(Op+1).getImmedValue();
|
||||
const MachineOperand &IndexReg = MI->getOperand(Op+2);
|
||||
const MachineOperand &DispSpec = MI->getOperand(Op+3);
|
||||
|
||||
if (BaseReg.isFrameIndex()) {
|
||||
O << "[frame slot #" << BaseReg.getFrameIndex();
|
||||
if (DispSpec.getImmedValue())
|
||||
O << " + " << DispSpec.getImmedValue();
|
||||
O << "]";
|
||||
return;
|
||||
} else if (BaseReg.isConstantPoolIndex()) {
|
||||
O << ".CPI" << CurrentFnName << "_"
|
||||
<< BaseReg.getConstantPoolIndex();
|
||||
if (DispSpec.getImmedValue())
|
||||
O << "+" << DispSpec.getImmedValue();
|
||||
if (IndexReg.getReg()) {
|
||||
O << "(,";
|
||||
printOp(IndexReg);
|
||||
if (ScaleVal != 1)
|
||||
O << "," << ScaleVal;
|
||||
O << ")";
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
if (DispSpec.isGlobalAddress()) {
|
||||
printOp(DispSpec, true);
|
||||
} else {
|
||||
int DispVal = DispSpec.getImmedValue();
|
||||
if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
|
||||
O << DispVal;
|
||||
}
|
||||
|
||||
if (IndexReg.getReg() || BaseReg.getReg()) {
|
||||
O << "(";
|
||||
if (BaseReg.getReg())
|
||||
printOp(BaseReg);
|
||||
|
||||
if (IndexReg.getReg()) {
|
||||
O << ",";
|
||||
printOp(IndexReg);
|
||||
if (ScaleVal != 1)
|
||||
O << "," << ScaleVal;
|
||||
}
|
||||
|
||||
O << ")";
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/// printMachineInstruction -- Print out a single X86 LLVM instruction
|
||||
/// MI in Intel syntax to the current output stream.
|
||||
///
|
||||
void X86ATTAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
|
||||
++EmittedInsts;
|
||||
// Call the autogenerated instruction printer routines.
|
||||
printInstruction(MI);
|
||||
}
|
||||
|
||||
|
||||
/// createX86CodePrinterPass - Returns a pass that prints the X86 assembly code
|
||||
/// for a MachineFunction to the given output stream, using the given target
|
||||
/// machine description.
|
||||
|
69
lib/Target/X86/X86AsmPrinter.h
Executable file
69
lib/Target/X86/X86AsmPrinter.h
Executable file
@ -0,0 +1,69 @@
|
||||
//===-- X86AsmPrinter.h - Convert X86 LLVM code to Intel assembly ---------===//
|
||||
//
|
||||
// The LLVM Compiler Infrastructure
|
||||
//
|
||||
// This file was developed by the LLVM research group and is distributed under
|
||||
// the University of Illinois Open Source License. See LICENSE.TXT for details.
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
//
|
||||
// This file the shared super class printer that converts from our internal
|
||||
// representation of machine-dependent LLVM code to Intel and AT&T format
|
||||
// assembly language. This printer is the output mechanism used by `llc'.
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
#ifndef X86ASMPRINTER_H
|
||||
#define X86ASMPRINTER_H
|
||||
|
||||
#include "X86.h"
|
||||
#include "llvm/CodeGen/AsmPrinter.h"
|
||||
#include "llvm/ADT/Statistic.h"
|
||||
|
||||
namespace llvm {
|
||||
namespace x86 {
|
||||
|
||||
extern Statistic<> EmittedInsts;
|
||||
|
||||
struct X86SharedAsmPrinter : public AsmPrinter {
|
||||
X86SharedAsmPrinter(std::ostream &O, TargetMachine &TM)
|
||||
: AsmPrinter(O, TM), forCygwin(false), forDarwin(false) { }
|
||||
|
||||
bool doInitialization(Module &M);
|
||||
void printConstantPool(MachineConstantPool *MCP);
|
||||
bool doFinalization(Module &M);
|
||||
|
||||
bool forCygwin;
|
||||
bool forDarwin;
|
||||
|
||||
inline static bool isScale(const MachineOperand &MO) {
|
||||
return MO.isImmediate() &&
|
||||
(MO.getImmedValue() == 1 || MO.getImmedValue() == 2 ||
|
||||
MO.getImmedValue() == 4 || MO.getImmedValue() == 8);
|
||||
}
|
||||
|
||||
inline static bool isMem(const MachineInstr *MI, unsigned Op) {
|
||||
if (MI->getOperand(Op).isFrameIndex()) return true;
|
||||
if (MI->getOperand(Op).isConstantPoolIndex()) return true;
|
||||
return Op+4 <= MI->getNumOperands() &&
|
||||
MI->getOperand(Op ).isRegister() && isScale(MI->getOperand(Op+1)) &&
|
||||
MI->getOperand(Op+2).isRegister() && (MI->getOperand(Op+3).isImmediate()||
|
||||
MI->getOperand(Op+3).isGlobalAddress());
|
||||
}
|
||||
|
||||
// SwitchSection - Switch to the specified section of the executable if we are
|
||||
// not already in it!
|
||||
inline static void SwitchSection(std::ostream &OS, std::string &CurSection,
|
||||
const char *NewSection) {
|
||||
if (CurSection != NewSection) {
|
||||
CurSection = NewSection;
|
||||
if (!CurSection.empty())
|
||||
OS << "\t" << NewSection << "\n";
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
} // end namespace x86
|
||||
} // end namespace llvm
|
||||
|
||||
#endif
|
205
lib/Target/X86/X86IntelAsmPrinter.cpp
Executable file
205
lib/Target/X86/X86IntelAsmPrinter.cpp
Executable file
@ -0,0 +1,205 @@
|
||||
//===-- X86IntelAsmPrinter.cpp - Convert X86 LLVM code to Intel assembly --===//
|
||||
//
|
||||
// The LLVM Compiler Infrastructure
|
||||
//
|
||||
// This file was developed by the LLVM research group and is distributed under
|
||||
// the University of Illinois Open Source License. See LICENSE.TXT for details.
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
//
|
||||
// This file contains a printer that converts from our internal representation
|
||||
// of machine-dependent LLVM code to Intel format assembly language.
|
||||
// This printer is the output mechanism used by `llc'.
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
#include "X86IntelAsmPrinter.h"
|
||||
#include "X86.h"
|
||||
#include "llvm/Module.h"
|
||||
#include "llvm/Assembly/Writer.h"
|
||||
#include "llvm/Support/Mangler.h"
|
||||
using namespace llvm;
|
||||
using namespace x86;
|
||||
|
||||
/// runOnMachineFunction - This uses the printMachineInstruction()
|
||||
/// method to print assembly for each instruction.
|
||||
///
|
||||
bool X86IntelAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
|
||||
setupMachineFunction(MF);
|
||||
O << "\n\n";
|
||||
|
||||
// Print out constants referenced by the function
|
||||
printConstantPool(MF.getConstantPool());
|
||||
|
||||
// Print out labels for the function.
|
||||
O << "\t.text\n";
|
||||
emitAlignment(4);
|
||||
O << "\t.globl\t" << CurrentFnName << "\n";
|
||||
if (!forCygwin && !forDarwin)
|
||||
O << "\t.type\t" << CurrentFnName << ", @function\n";
|
||||
O << CurrentFnName << ":\n";
|
||||
|
||||
// Print out code for the function.
|
||||
for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
|
||||
I != E; ++I) {
|
||||
// Print a label for the basic block if there are any predecessors.
|
||||
if (I->pred_begin() != I->pred_end())
|
||||
O << ".LBB" << CurrentFnName << "_" << I->getNumber() << ":\t"
|
||||
<< CommentString << " " << I->getBasicBlock()->getName() << "\n";
|
||||
for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
|
||||
II != E; ++II) {
|
||||
// Print the assembly for the instruction.
|
||||
O << "\t";
|
||||
printMachineInstruction(II);
|
||||
}
|
||||
}
|
||||
|
||||
// We didn't modify anything.
|
||||
return false;
|
||||
}
|
||||
|
||||
void X86IntelAsmPrinter::printOp(const MachineOperand &MO,
|
||||
bool elideOffsetKeyword /* = false */) {
|
||||
const MRegisterInfo &RI = *TM.getRegisterInfo();
|
||||
switch (MO.getType()) {
|
||||
case MachineOperand::MO_VirtualRegister:
|
||||
if (Value *V = MO.getVRegValueOrNull()) {
|
||||
O << "<" << V->getName() << ">";
|
||||
return;
|
||||
}
|
||||
// FALLTHROUGH
|
||||
case MachineOperand::MO_MachineRegister:
|
||||
if (MRegisterInfo::isPhysicalRegister(MO.getReg()))
|
||||
// Bug Workaround: See note in Printer::doInitialization about %.
|
||||
O << "%" << RI.get(MO.getReg()).Name;
|
||||
else
|
||||
O << "%reg" << MO.getReg();
|
||||
return;
|
||||
|
||||
case MachineOperand::MO_SignExtendedImmed:
|
||||
case MachineOperand::MO_UnextendedImmed:
|
||||
O << (int)MO.getImmedValue();
|
||||
return;
|
||||
case MachineOperand::MO_MachineBasicBlock: {
|
||||
MachineBasicBlock *MBBOp = MO.getMachineBasicBlock();
|
||||
O << ".LBB" << Mang->getValueName(MBBOp->getParent()->getFunction())
|
||||
<< "_" << MBBOp->getNumber () << "\t# "
|
||||
<< MBBOp->getBasicBlock ()->getName ();
|
||||
return;
|
||||
}
|
||||
case MachineOperand::MO_PCRelativeDisp:
|
||||
std::cerr << "Shouldn't use addPCDisp() when building X86 MachineInstrs";
|
||||
abort ();
|
||||
return;
|
||||
case MachineOperand::MO_GlobalAddress: {
|
||||
if (!elideOffsetKeyword)
|
||||
O << "OFFSET ";
|
||||
O << Mang->getValueName(MO.getGlobal());
|
||||
int Offset = MO.getOffset();
|
||||
if (Offset > 0)
|
||||
O << " + " << Offset;
|
||||
else if (Offset < 0)
|
||||
O << " - " << -Offset;
|
||||
return;
|
||||
}
|
||||
case MachineOperand::MO_ExternalSymbol:
|
||||
O << GlobalPrefix << MO.getSymbolName();
|
||||
return;
|
||||
default:
|
||||
O << "<unknown operand type>"; return;
|
||||
}
|
||||
}
|
||||
|
||||
void X86IntelAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op){
|
||||
assert(isMem(MI, Op) && "Invalid memory reference!");
|
||||
|
||||
const MachineOperand &BaseReg = MI->getOperand(Op);
|
||||
int ScaleVal = MI->getOperand(Op+1).getImmedValue();
|
||||
const MachineOperand &IndexReg = MI->getOperand(Op+2);
|
||||
const MachineOperand &DispSpec = MI->getOperand(Op+3);
|
||||
|
||||
if (BaseReg.isFrameIndex()) {
|
||||
O << "[frame slot #" << BaseReg.getFrameIndex();
|
||||
if (DispSpec.getImmedValue())
|
||||
O << " + " << DispSpec.getImmedValue();
|
||||
O << "]";
|
||||
return;
|
||||
} else if (BaseReg.isConstantPoolIndex()) {
|
||||
O << "[.CPI" << CurrentFnName << "_"
|
||||
<< BaseReg.getConstantPoolIndex();
|
||||
|
||||
if (IndexReg.getReg()) {
|
||||
O << " + ";
|
||||
if (ScaleVal != 1)
|
||||
O << ScaleVal << "*";
|
||||
printOp(IndexReg);
|
||||
}
|
||||
|
||||
if (DispSpec.getImmedValue())
|
||||
O << " + " << DispSpec.getImmedValue();
|
||||
O << "]";
|
||||
return;
|
||||
}
|
||||
|
||||
O << "[";
|
||||
bool NeedPlus = false;
|
||||
if (BaseReg.getReg()) {
|
||||
printOp(BaseReg, true);
|
||||
NeedPlus = true;
|
||||
}
|
||||
|
||||
if (IndexReg.getReg()) {
|
||||
if (NeedPlus) O << " + ";
|
||||
if (ScaleVal != 1)
|
||||
O << ScaleVal << "*";
|
||||
printOp(IndexReg);
|
||||
NeedPlus = true;
|
||||
}
|
||||
|
||||
if (DispSpec.isGlobalAddress()) {
|
||||
if (NeedPlus)
|
||||
O << " + ";
|
||||
printOp(DispSpec, true);
|
||||
} else {
|
||||
int DispVal = DispSpec.getImmedValue();
|
||||
if (DispVal || (!BaseReg.getReg() && !IndexReg.getReg())) {
|
||||
if (NeedPlus)
|
||||
if (DispVal > 0)
|
||||
O << " + ";
|
||||
else {
|
||||
O << " - ";
|
||||
DispVal = -DispVal;
|
||||
}
|
||||
O << DispVal;
|
||||
}
|
||||
}
|
||||
O << "]";
|
||||
}
|
||||
|
||||
|
||||
/// printMachineInstruction -- Print out a single X86 LLVM instruction
|
||||
/// MI in Intel syntax to the current output stream.
|
||||
///
|
||||
void X86IntelAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
|
||||
++EmittedInsts;
|
||||
|
||||
// Call the autogenerated instruction printer routines.
|
||||
printInstruction(MI);
|
||||
}
|
||||
|
||||
bool X86IntelAsmPrinter::doInitialization(Module &M) {
|
||||
AsmPrinter::doInitialization(M);
|
||||
// Tell gas we are outputting Intel syntax (not AT&T syntax) assembly.
|
||||
//
|
||||
// Bug: gas in `intel_syntax noprefix' mode interprets the symbol `Sp' in an
|
||||
// instruction as a reference to the register named sp, and if you try to
|
||||
// reference a symbol `Sp' (e.g. `mov ECX, OFFSET Sp') then it gets lowercased
|
||||
// before being looked up in the symbol table. This creates spurious
|
||||
// `undefined symbol' errors when linking. Workaround: Do not use `noprefix'
|
||||
// mode, and decorate all register names with percent signs.
|
||||
O << "\t.intel_syntax\n";
|
||||
return false;
|
||||
}
|
||||
|
||||
// Include the auto-generated portion of the assembly writer.
|
||||
#include "X86GenAsmWriter1.inc"
|
81
lib/Target/X86/X86IntelAsmPrinter.h
Executable file
81
lib/Target/X86/X86IntelAsmPrinter.h
Executable file
@ -0,0 +1,81 @@
|
||||
//===-- X86IntelAsmPrinter.h - Convert X86 LLVM code to Intel assembly ----===//
|
||||
//
|
||||
// The LLVM Compiler Infrastructure
|
||||
//
|
||||
// This file was developed by the LLVM research group and is distributed under
|
||||
// the University of Illinois Open Source License. See LICENSE.TXT for details.
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
//
|
||||
// Intel assembly code printer class.
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
#ifndef X86INTELASMPRINTER_H
|
||||
#define X86INTELASMPRINTER_H
|
||||
|
||||
#include "X86AsmPrinter.h"
|
||||
#include "llvm/CodeGen/ValueTypes.h"
|
||||
#include "llvm/Target/TargetMachine.h"
|
||||
#include "llvm/Target/MRegisterInfo.h"
|
||||
|
||||
namespace llvm {
|
||||
namespace x86 {
|
||||
|
||||
struct X86IntelAsmPrinter : public X86SharedAsmPrinter {
|
||||
X86IntelAsmPrinter(std::ostream &O, TargetMachine &TM)
|
||||
: X86SharedAsmPrinter(O, TM) { }
|
||||
|
||||
virtual const char *getPassName() const {
|
||||
return "X86 Intel-Style Assembly Printer";
|
||||
}
|
||||
|
||||
/// printInstruction - This method is automatically generated by tablegen
|
||||
/// from the instruction set description. This method returns true if the
|
||||
/// machine instruction was sufficiently described to print it, otherwise it
|
||||
/// returns false.
|
||||
bool printInstruction(const MachineInstr *MI);
|
||||
|
||||
// This method is used by the tablegen'erated instruction printer.
|
||||
void printOperand(const MachineInstr *MI, unsigned OpNo, MVT::ValueType VT){
|
||||
const MachineOperand &MO = MI->getOperand(OpNo);
|
||||
if (MO.getType() == MachineOperand::MO_MachineRegister) {
|
||||
assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physref??");
|
||||
// Bug Workaround: See note in Printer::doInitialization about %.
|
||||
O << "%" << TM.getRegisterInfo()->get(MO.getReg()).Name;
|
||||
} else {
|
||||
printOp(MO);
|
||||
}
|
||||
}
|
||||
|
||||
void printCallOperand(const MachineInstr *MI, unsigned OpNo,
|
||||
MVT::ValueType VT) {
|
||||
printOp(MI->getOperand(OpNo), true); // Don't print "OFFSET".
|
||||
}
|
||||
|
||||
void printMemoryOperand(const MachineInstr *MI, unsigned OpNo,
|
||||
MVT::ValueType VT) {
|
||||
switch (VT) {
|
||||
default: assert(0 && "Unknown arg size!");
|
||||
case MVT::i8: O << "BYTE PTR "; break;
|
||||
case MVT::i16: O << "WORD PTR "; break;
|
||||
case MVT::i32:
|
||||
case MVT::f32: O << "DWORD PTR "; break;
|
||||
case MVT::i64:
|
||||
case MVT::f64: O << "QWORD PTR "; break;
|
||||
case MVT::f80: O << "XWORD PTR "; break;
|
||||
}
|
||||
printMemReference(MI, OpNo);
|
||||
}
|
||||
|
||||
void printMachineInstruction(const MachineInstr *MI);
|
||||
void printOp(const MachineOperand &MO, bool elideOffsetKeyword = false);
|
||||
void printMemReference(const MachineInstr *MI, unsigned Op);
|
||||
bool runOnMachineFunction(MachineFunction &F);
|
||||
bool doInitialization(Module &M);
|
||||
};
|
||||
|
||||
} // end namespace x86
|
||||
} // end namespace llvm
|
||||
|
||||
#endif
|
Loading…
Reference in New Issue
Block a user