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MOVi16 (movw) is only legal on cpus with V6T2 support. rdar://12300648

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164169 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2012-09-18 21:24:16 +00:00
parent 30ce40e3f7
commit b37b6ca4bb
3 changed files with 16 additions and 3 deletions
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6
lib/Target/ARM/ARMInstrInfo.td
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@ -3092,9 +3092,11 @@ def : ARMPat<(ARMaddc GPR:$src, so_imm_neg:$imm),
(SUBSri GPR:$src, so_imm_neg:$imm)>;
def : ARMPat<(add GPR:$src, imm0_65535_neg:$imm),
(SUBrr GPR:$src, (MOVi16 (imm_neg_XFORM imm:$imm)))>;
(SUBrr GPR:$src, (MOVi16 (imm_neg_XFORM imm:$imm)))>,
Requires<[IsARM, HasV6T2]>;
def : ARMPat<(ARMaddc GPR:$src, imm0_65535_neg:$imm),
(SUBSrr GPR:$src, (MOVi16 (imm_neg_XFORM imm:$imm)))>;
(SUBSrr GPR:$src, (MOVi16 (imm_neg_XFORM imm:$imm)))>,
Requires<[IsARM, HasV6T2]>;
// The with-carry-in form matches bitwise not instead of the negation.
// Effectively, the inverse interpretation of the carry flag already accounts

11
test/CodeGen/ARM/2012-09-18-ARMv4ISelBug.ll Normal file
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@ -0,0 +1,11 @@
; RUN: llc < %s -march=arm -mcpu=arm7tdmi | FileCheck %s
; movw is only legal for V6T2 and later.
; rdar://12300648
define i32 @t(i32 %x) {
; CHECK: t:
; CHECK-NOT: movw
%tmp = add i32 %x, -65535
ret i32 %tmp
}

2
test/CodeGen/ARM/sub.ll
View File

@ -1,4 +1,4 @@
; RUN: llc -march=arm < %s | FileCheck %s
; RUN: llc -march=arm -mcpu=cortex-a8 < %s | FileCheck %s
; 171 = 0x000000ab
define i64 @f1(i64 %a) {