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Tidy a bit more.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67617 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2009-03-24 15:25:07 +00:00
parent fc9d161f16
commit b3b4484e3d
1 changed files with 3 additions and 3 deletions
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6
lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
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@ -4929,15 +4929,15 @@ GetRegistersForValue(SDISelAsmOperandInfo &OpInfo,
// Otherwise, if this was a reference to an LLVM register class, create vregs
// for this reference.
if (PhysReg.second != 0) {
RegVT = *PhysReg.second->vt_begin();
if (const TargetRegisterClass *RC = PhysReg.second) {
RegVT = *RC->vt_begin();
if (OpInfo.ConstraintVT == MVT::Other)
ValueVT = RegVT;
// Create the appropriate number of virtual registers.
MachineRegisterInfo &RegInfo = MF.getRegInfo();
for (; NumRegs; --NumRegs)
Regs.push_back(RegInfo.createVirtualRegister(PhysReg.second));
Regs.push_back(RegInfo.createVirtualRegister(RC));
OpInfo.AssignedRegs = RegsForValue(TLI, Regs, RegVT, ValueVT);
return;