mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-17 05:29:24 +00:00
Added support for both call/jmpl instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@930 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Ruchira Sasanka
parent
5ab1f87786
commit
b3b6f5338c
@ -86,7 +86,6 @@ class MachineRegInfo : public NonCopyableV {
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protected:
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MachineRegClassArrayType MachineRegClassArr;
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public:
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@ -171,6 +170,7 @@ public:
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virtual int getRegType(const LiveRange *const LR) const=0;
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virtual const Value * getCallInstRetVal(const MachineInstr *CallMI) const=0;
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inline virtual unsigned getFramePointer() const=0;
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@ -149,7 +149,7 @@ void PhyRegAlloc::setCallInterferences(const MachineInstr *MInst,
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const LiveVarSet *const LVSetAft )
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{
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// Now find the LR of the return value of the call
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// The last *implicit operand* is the return value of a call
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// We do this because, we look at the LV set *after* the instruction
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// to determine, which LRs must be saved across calls. The return value
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@ -158,19 +158,13 @@ void PhyRegAlloc::setCallInterferences(const MachineInstr *MInst,
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LiveRange *RetValLR = NULL;
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unsigned NumOfImpRefs = MInst->getNumImplicitRefs();
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if( NumOfImpRefs > 0 ) {
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if( MInst->implicitRefIsDefined(NumOfImpRefs-1) ) {
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const Value *RetVal = MInst->getImplicitRef(NumOfImpRefs-1);
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RetValLR = LRI.getLiveRangeForValue( RetVal );
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assert( RetValLR && "No LR for RetValue of call");
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}
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const Value *RetVal = MRI.getCallInstRetVal( MInst );
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if( RetVal ) {
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RetValLR = LRI.getLiveRangeForValue( RetVal );
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assert( RetValLR && "No LR for RetValue of call");
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}
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if( DEBUG_RA)
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cout << "\n For call inst: " << *MInst;
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@ -356,20 +350,17 @@ void PhyRegAlloc::insertCallerSavingCode(const MachineInstr *MInst,
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// to determine, which LRs must be saved across calls. The return value
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// of the call is live in this set - but we must not save/restore it.
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unsigned NumOfImpRefs = MInst->getNumImplicitRefs();
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if( NumOfImpRefs > 0 ) {
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if( MInst->implicitRefIsDefined(NumOfImpRefs-1) ) {
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const Value *RetVal = MInst->getImplicitRef(NumOfImpRefs-1);
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LiveRange *RetValLR = LRI.getLiveRangeForValue( RetVal );
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assert( RetValLR && "No LR for RetValue of call");
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const Value *RetVal = MRI.getCallInstRetVal( MInst );
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PushedRegSet.insert(
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MRI.getUnifiedRegNum((RetValLR->getRegClass())->getID(),
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RetValLR->getColor() ) );
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}
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if( RetVal ) {
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LiveRange *RetValLR = LRI.getLiveRangeForValue( RetVal );
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assert( RetValLR && "No LR for RetValue of call");
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PushedRegSet.insert(
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MRI.getUnifiedRegNum((RetValLR->getRegClass())->getID(),
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RetValLR->getColor() ) );
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}
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@ -149,7 +149,7 @@ void PhyRegAlloc::setCallInterferences(const MachineInstr *MInst,
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const LiveVarSet *const LVSetAft )
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{
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// Now find the LR of the return value of the call
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// The last *implicit operand* is the return value of a call
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// We do this because, we look at the LV set *after* the instruction
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// to determine, which LRs must be saved across calls. The return value
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@ -158,19 +158,13 @@ void PhyRegAlloc::setCallInterferences(const MachineInstr *MInst,
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LiveRange *RetValLR = NULL;
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unsigned NumOfImpRefs = MInst->getNumImplicitRefs();
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if( NumOfImpRefs > 0 ) {
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if( MInst->implicitRefIsDefined(NumOfImpRefs-1) ) {
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const Value *RetVal = MInst->getImplicitRef(NumOfImpRefs-1);
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RetValLR = LRI.getLiveRangeForValue( RetVal );
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assert( RetValLR && "No LR for RetValue of call");
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}
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const Value *RetVal = MRI.getCallInstRetVal( MInst );
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if( RetVal ) {
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RetValLR = LRI.getLiveRangeForValue( RetVal );
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assert( RetValLR && "No LR for RetValue of call");
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}
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if( DEBUG_RA)
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cout << "\n For call inst: " << *MInst;
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@ -356,20 +350,17 @@ void PhyRegAlloc::insertCallerSavingCode(const MachineInstr *MInst,
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// to determine, which LRs must be saved across calls. The return value
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// of the call is live in this set - but we must not save/restore it.
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unsigned NumOfImpRefs = MInst->getNumImplicitRefs();
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if( NumOfImpRefs > 0 ) {
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if( MInst->implicitRefIsDefined(NumOfImpRefs-1) ) {
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const Value *RetVal = MInst->getImplicitRef(NumOfImpRefs-1);
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LiveRange *RetValLR = LRI.getLiveRangeForValue( RetVal );
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assert( RetValLR && "No LR for RetValue of call");
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const Value *RetVal = MRI.getCallInstRetVal( MInst );
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PushedRegSet.insert(
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MRI.getUnifiedRegNum((RetValLR->getRegClass())->getID(),
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RetValLR->getColor() ) );
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}
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if( RetVal ) {
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LiveRange *RetValLR = LRI.getLiveRangeForValue( RetVal );
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assert( RetValLR && "No LR for RetValue of call");
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PushedRegSet.insert(
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MRI.getUnifiedRegNum((RetValLR->getRegClass())->getID(),
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RetValLR->getColor() ) );
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}
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@ -171,7 +171,8 @@ class UltraSparcRegInfo : public MachineRegInfo
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void suggestReg4RetAddr(const MachineInstr * RetMI,
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LiveRangeInfo& LRI) const;
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void suggestReg4CallAddr(const MachineInstr * CallMI) const;
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void suggestReg4CallAddr(const MachineInstr * CallMI, LiveRangeInfo& LRI,
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vector<RegClass *> RCList) const;
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Value *getValue4ReturnAddr( const MachineInstr * MInst ) const ;
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@ -235,6 +236,9 @@ class UltraSparcRegInfo : public MachineRegInfo
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MachineInstr * cpValue2RegMI(Value * Val, const unsigned DestReg,
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const int RegType) const;
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const Value *getCallInstRetAddr(const MachineInstr *CallMI) const;
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const unsigned getCallInstNumArgs(const MachineInstr *CallMI) const;
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public:
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@ -361,6 +365,8 @@ class UltraSparcRegInfo : public MachineRegInfo
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}
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const Value * getCallInstRetVal(const MachineInstr *CallMI) const;
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MachineInstr * cpReg2RegMI(const unsigned SrcReg, const unsigned DestReg,
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const int RegType) const;
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@ -16,6 +16,123 @@
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// UltraSparcRegInfo
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//---------------------------------------------------------------------------
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//---------------------------------------------------------------------------
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// Finds the return value of a call instruction
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//---------------------------------------------------------------------------
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const Value *
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UltraSparcRegInfo::getCallInstRetVal(const MachineInstr *CallMI) const{
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unsigned OpCode = CallMI->getOpCode();
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unsigned NumOfImpRefs = CallMI->getNumImplicitRefs();
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if( OpCode == CALL ) {
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// The one before the last implicit operand is the return value of
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// a CALL instr
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if( NumOfImpRefs > 1 )
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if( CallMI->implicitRefIsDefined(NumOfImpRefs-2) )
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return CallMI->getImplicitRef(NumOfImpRefs-2);
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}
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else if( OpCode == JMPL) {
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// The last implicit operand is the return value of a JMPL in
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if( NumOfImpRefs > 0 )
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if( CallMI->implicitRefIsDefined(NumOfImpRefs-1) )
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return CallMI->getImplicitRef(NumOfImpRefs-1);
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}
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else
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assert(0 && "OpCode must be CALL/JMPL for a call instr");
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return NULL;
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}
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//---------------------------------------------------------------------------
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// Finds the return address of a call instruction
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//---------------------------------------------------------------------------
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const Value *
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UltraSparcRegInfo::getCallInstRetAddr(const MachineInstr *CallMI)const {
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unsigned OpCode = CallMI->getOpCode();
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if( OpCode == CALL) {
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unsigned NumOfImpRefs = CallMI->getNumImplicitRefs();
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assert( NumOfImpRefs && "CALL instr must have at least on ImpRef");
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// The last implicit operand is the return address of a CALL instr
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return CallMI->getImplicitRef(NumOfImpRefs-1);
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}
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else if( OpCode == JMPL ) {
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MachineOperand & MO = ( MachineOperand &) CallMI->getOperand(2);
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return MO.getVRegValue();
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}
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else
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assert(0 && "OpCode must be CALL/JMPL for a call instr");
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assert(0 && "There must be a return addr for a call instr");
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return NULL;
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}
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//---------------------------------------------------------------------------
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// Finds the # of actaul arguments of the call instruction
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//---------------------------------------------------------------------------
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const unsigned
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UltraSparcRegInfo::getCallInstNumArgs(const MachineInstr *CallMI) const {
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unsigned OpCode = CallMI->getOpCode();
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unsigned NumOfImpRefs = CallMI->getNumImplicitRefs();
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int NumArgs = -1;
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if( OpCode == CALL ) {
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switch( NumOfImpRefs ) {
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case 0: assert(0 && "A CALL inst must have at least one ImpRef (RetAddr)");
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case 1: NumArgs = 0;
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break;
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default: // two or more implicit refs
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if( CallMI->implicitRefIsDefined(NumOfImpRefs-2) )
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NumArgs = NumOfImpRefs - 2; // i.e., NumOfImpRef-2 is the ret val
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else
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NumArgs = NumOfImpRefs - 1;
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}
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}
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else if( OpCode == JMPL ) {
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// The last implicit operand is the return value of a JMPL instr
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if( NumOfImpRefs > 0 ) {
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if( CallMI->implicitRefIsDefined(NumOfImpRefs-1) )
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NumArgs = NumOfImpRefs - 1; // i.e., NumOfImpRef-1 is the ret val
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else
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NumArgs = NumOfImpRefs;
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}
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else
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NumArgs = NumOfImpRefs;
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}
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else
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assert(0 && "OpCode must be CALL/JMPL for a call instr");
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assert( (NumArgs != -1) && "Internal error in getCallInstNumArgs" );
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return (unsigned) NumArgs;
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}
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//---------------------------------------------------------------------------
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// Suggests a register for the ret address in the RET machine instruction
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//---------------------------------------------------------------------------
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@ -27,6 +144,10 @@ void UltraSparcRegInfo::suggestReg4RetAddr(const MachineInstr * RetMI,
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MO.setRegForValue( getUnifiedRegNum( IntRegClassID, SparcIntRegOrder::i7) );
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// ***TODO: If the JMPL can be also used as a return instruction,
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// change the assertion. The return address register of JMPL will still
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// be Operand(0)
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// TODO (Optimize):
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// Instead of setting the color, we can suggest one. In that case,
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@ -51,9 +172,25 @@ void UltraSparcRegInfo::suggestReg4RetAddr(const MachineInstr * RetMI,
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//---------------------------------------------------------------------------
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// Suggests a register for the ret address in the JMPL/CALL machine instr
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//---------------------------------------------------------------------------
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void UltraSparcRegInfo::suggestReg4CallAddr(const MachineInstr * CallMI) const
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{
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void UltraSparcRegInfo::suggestReg4CallAddr(const MachineInstr * CallMI,
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LiveRangeInfo& LRI,
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vector<RegClass *> RCList) const {
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const Value *RetAddrVal = getCallInstRetAddr( CallMI );
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// RetAddrVal cannot be NULL (asserted in getCallInstRetAddr)
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// create a new LR for the return address and color it
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LiveRange * RetAddrLR = new LiveRange();
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RetAddrLR->add( RetAddrVal );
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unsigned RegClassID = getRegClassIDOfValue( RetAddrVal );
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RetAddrLR->setRegClass( RCList[RegClassID] );
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RetAddrLR->setColor(getUnifiedRegNum(IntRegClassID,SparcIntRegOrder::o7));
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LRI.addLRToMap( RetAddrVal, RetAddrLR);
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/*
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assert( (CallMI->getNumOperands() == 3) && "JMPL must have 3 operands");
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// directly set color since the LR of ret address (if there were one)
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@ -61,6 +198,9 @@ void UltraSparcRegInfo::suggestReg4CallAddr(const MachineInstr * CallMI) const
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MachineOperand & MO = ( MachineOperand &) CallMI->getOperand(2);
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MO.setRegForValue( getUnifiedRegNum( IntRegClassID,SparcIntRegOrder::o7) );
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*/
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}
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@ -220,7 +360,7 @@ void UltraSparcRegInfo::suggestRegs4CallArgs(const MachineInstr *const CallMI,
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assert ( (UltraSparcInfo->getInstrInfo()).isCall(CallMI->getOpCode()) );
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suggestReg4CallAddr(CallMI);
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suggestReg4CallAddr(CallMI, LRI, RCList);
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// First color the return value of the call instruction. The return value
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@ -233,49 +373,42 @@ void UltraSparcRegInfo::suggestRegs4CallArgs(const MachineInstr *const CallMI,
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// if type is not void, create a new live range and set its
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// register class and add to LRI
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unsigned NumOfImpRefs = CallMI->getNumImplicitRefs();
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unsigned NumOfCallArgs = NumOfImpRefs; // assume all implicits are args
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if( NumOfImpRefs > 0 ) {
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const Value *RetVal = getCallInstRetVal( CallMI );
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// The last implicit operand is the return value of a call
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if( CallMI->implicitRefIsDefined(NumOfImpRefs-1) ) {
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const Value *RetVal = CallMI->getImplicitRef(NumOfImpRefs-1);
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if( RetVal ) {
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assert( (! LRI.getLiveRangeForValue( RetVal ) ) &&
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"LR for ret Value of call already definded!");
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assert( (! LRI.getLiveRangeForValue( RetVal ) ) &&
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"LR for ret Value of call already definded!");
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// create a new LR for the return value
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LiveRange * RetValLR = new LiveRange();
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RetValLR->add( RetVal );
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unsigned RegClassID = getRegClassIDOfValue( RetVal );
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RetValLR->setRegClass( RCList[RegClassID] );
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LRI.addLRToMap( RetVal, RetValLR);
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LiveRange * RetValLR = new LiveRange();
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RetValLR->add( RetVal );
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unsigned RegClassID = getRegClassIDOfValue( RetVal );
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RetValLR->setRegClass( RCList[RegClassID] );
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LRI.addLRToMap( RetVal, RetValLR);
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// now suggest a register depending on the register class of ret arg
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// now suggest a register depending on the register class of ret arg
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if( RegClassID == IntRegClassID )
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RetValLR->setSuggestedColor(SparcIntRegOrder::o0);
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else if (RegClassID == FloatRegClassID )
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RetValLR->setSuggestedColor(SparcFloatRegOrder::f0 );
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else assert( 0 && "Unknown reg class for return value of call\n");
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// the last imp ref is the def, so one less arg
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NumOfCallArgs--;
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}
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if( RegClassID == IntRegClassID )
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RetValLR->setSuggestedColor(SparcIntRegOrder::o0);
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else if (RegClassID == FloatRegClassID )
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RetValLR->setSuggestedColor(SparcFloatRegOrder::f0 );
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else assert( 0 && "Unknown reg class for return value of call\n");
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}
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// Now suggest colors for arguments (operands) of the call instruction.
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// Colors are suggested only if the arg number is smaller than the
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// the number of registers allocated for argument passing.
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// Now, go thru call args - implicit operands of the call MI
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unsigned NumOfCallArgs = getCallInstNumArgs( CallMI );
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// go thru call args - implicit operands of the call MI
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for(unsigned argNo=0, i=0; i < NumOfCallArgs; ++i, ++argNo ) {
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const Value *CallArg = CallMI->getImplicitRef(i);
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@ -331,7 +464,6 @@ void UltraSparcRegInfo::colorCallArgs(const MachineInstr *const CallMI,
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LiveRangeInfo& LRI,
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AddedInstrns *const CallAI) const {
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assert ( (UltraSparcInfo->getInstrInfo()).isCall(CallMI->getOpCode()) );
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// First color the return value of the call.
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@ -340,79 +472,68 @@ void UltraSparcRegInfo::colorCallArgs(const MachineInstr *const CallMI,
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MachineInstr *AdMI;
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unsigned NumOfImpRefs = CallMI->getNumImplicitRefs();
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unsigned NumOfCallArgs = NumOfImpRefs; // assume all implicits are args
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const Value *RetVal = getCallInstRetVal( CallMI );
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if( NumOfImpRefs > 0 ) {
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if( RetVal ) {
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// The last implicit operand is the return value of a call
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if( CallMI->implicitRefIsDefined(NumOfImpRefs-1) ) {
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LiveRange * RetValLR = LRI.getLiveRangeForValue( RetVal );
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// one less call arg since last implicit ref is the return value
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NumOfCallArgs--;
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// find the return value and its LR
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const Value *RetVal = CallMI->getImplicitRef(NumOfImpRefs-1);
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LiveRange * RetValLR = LRI.getLiveRangeForValue( RetVal );
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if( !RetValLR ) {
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cerr << "\nNo LR for:";
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printValue( RetVal );
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cerr << endl;
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assert( RetValLR && "ERR:No LR for non-void return value");
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//return;
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}
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bool recvSugColor = false;
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if( RetValLR->hasSuggestedColor() && RetValLR->hasColor() )
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if( RetValLR->getSuggestedColor() == RetValLR->getColor())
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recvSugColor = true;
|
||||
|
||||
// if we didn't receive the suggested color for some reason,
|
||||
// put copy instruction
|
||||
|
||||
if( !recvSugColor ) {
|
||||
|
||||
if( RetValLR->hasColor() ) {
|
||||
|
||||
unsigned RegType = getRegType( RetValLR );
|
||||
unsigned RegClassID = (RetValLR->getRegClass())->getID();
|
||||
|
||||
unsigned
|
||||
UniRetLRReg=getUnifiedRegNum(RegClassID,RetValLR->getColor());
|
||||
unsigned UniRetReg = InvalidRegNum;
|
||||
|
||||
// find where we receive the return value depending on
|
||||
// register class
|
||||
|
||||
if(RegClassID == IntRegClassID)
|
||||
UniRetReg = getUnifiedRegNum( RegClassID, SparcIntRegOrder::o0);
|
||||
else if(RegClassID == FloatRegClassID)
|
||||
UniRetReg = getUnifiedRegNum( RegClassID, SparcFloatRegOrder::f0);
|
||||
|
||||
|
||||
AdMI = cpReg2RegMI(UniRetReg, UniRetLRReg, RegType );
|
||||
CallAI->InstrnsAfter.push_back( AdMI );
|
||||
|
||||
|
||||
} // if LR has color
|
||||
else {
|
||||
|
||||
assert(0 && "LR of return value is splilled");
|
||||
}
|
||||
|
||||
|
||||
} // the LR didn't receive the suggested color
|
||||
if( !RetValLR ) {
|
||||
cerr << "\nNo LR for:";
|
||||
printValue( RetVal );
|
||||
cerr << endl;
|
||||
assert( RetValLR && "ERR:No LR for non-void return value");
|
||||
//return;
|
||||
}
|
||||
|
||||
} // if there a return value
|
||||
|
||||
} // if there is an implicit arg for a return value
|
||||
bool recvSugColor = false;
|
||||
|
||||
if( RetValLR->hasSuggestedColor() && RetValLR->hasColor() )
|
||||
if( RetValLR->getSuggestedColor() == RetValLR->getColor())
|
||||
recvSugColor = true;
|
||||
|
||||
// if we didn't receive the suggested color for some reason,
|
||||
// put copy instruction
|
||||
|
||||
if( !recvSugColor ) {
|
||||
|
||||
if( RetValLR->hasColor() ) {
|
||||
|
||||
unsigned RegType = getRegType( RetValLR );
|
||||
unsigned RegClassID = (RetValLR->getRegClass())->getID();
|
||||
|
||||
unsigned
|
||||
UniRetLRReg=getUnifiedRegNum(RegClassID,RetValLR->getColor());
|
||||
unsigned UniRetReg = InvalidRegNum;
|
||||
|
||||
// find where we receive the return value depending on
|
||||
// register class
|
||||
|
||||
if(RegClassID == IntRegClassID)
|
||||
UniRetReg = getUnifiedRegNum( RegClassID, SparcIntRegOrder::o0);
|
||||
else if(RegClassID == FloatRegClassID)
|
||||
UniRetReg = getUnifiedRegNum( RegClassID, SparcFloatRegOrder::f0);
|
||||
|
||||
|
||||
AdMI = cpReg2RegMI(UniRetReg, UniRetLRReg, RegType );
|
||||
CallAI->InstrnsAfter.push_back( AdMI );
|
||||
|
||||
|
||||
} // if LR has color
|
||||
else {
|
||||
|
||||
assert(0 && "LR of return value is splilled");
|
||||
}
|
||||
|
||||
|
||||
} // the LR didn't receive the suggested color
|
||||
|
||||
} // if there a return value
|
||||
|
||||
|
||||
|
||||
// Now color all args of the call instruction
|
||||
|
||||
unsigned NumOfCallArgs = getCallInstNumArgs( CallMI );
|
||||
|
||||
for(unsigned argNo=0, i=0; i < NumOfCallArgs; ++i, ++argNo ) {
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user