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invert the sense of this switch and its name

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25234 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-01-12 01:28:56 +00:00
parent c3f8c2eaac
commit b3c77152c8
2 changed files with 8 additions and 8 deletions
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8
lib/Target/Sparc/SparcTargetMachine.cpp
View File

@ -28,9 +28,9 @@ namespace {
// Register the target.
RegisterTarget<SparcV8TargetMachine> X("sparcv8"," SPARC V8 (experimental)");
cl::opt<bool> DisableV8DAGDAG("disable-v8-dag-isel", cl::Hidden,
cl::desc("Disable DAG-to-DAG isel for V8"),
cl::init(1));
cl::opt<bool> EnableV8DAGDAG("enable-v8-dag-isel", cl::Hidden,
cl::desc("Enable DAG-to-DAG isel for V8"),
cl::init(0));
}
/// SparcV8TargetMachine ctor - Create an ILP32 architecture model
@ -86,7 +86,7 @@ bool SparcV8TargetMachine::addPassesToEmitFile(PassManager &PM,
if (PrintMachineCode)
PM.add(new PrintFunctionPass());
if (DisableV8DAGDAG) {
if (!EnableV8DAGDAG) {
// Replace malloc and free instructions with library calls.
PM.add(createLowerAllocationsPass());
PM.add(createLowerSelectPass());

8
lib/Target/SparcV8/SparcV8TargetMachine.cpp
View File

@ -28,9 +28,9 @@ namespace {
// Register the target.
RegisterTarget<SparcV8TargetMachine> X("sparcv8"," SPARC V8 (experimental)");
cl::opt<bool> DisableV8DAGDAG("disable-v8-dag-isel", cl::Hidden,
cl::desc("Disable DAG-to-DAG isel for V8"),
cl::init(1));
cl::opt<bool> EnableV8DAGDAG("enable-v8-dag-isel", cl::Hidden,
cl::desc("Enable DAG-to-DAG isel for V8"),
cl::init(0));
}
/// SparcV8TargetMachine ctor - Create an ILP32 architecture model
@ -86,7 +86,7 @@ bool SparcV8TargetMachine::addPassesToEmitFile(PassManager &PM,
if (PrintMachineCode)
PM.add(new PrintFunctionPass());
if (DisableV8DAGDAG) {
if (!EnableV8DAGDAG) {
// Replace malloc and free instructions with library calls.
PM.add(createLowerAllocationsPass());
PM.add(createLowerSelectPass());