From b3cdb0ec31482b7fd730ccee92b19455f6f3022b Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Fri, 9 Apr 2010 01:22:56 +0000 Subject: [PATCH] Fix a bug in IVUsers which was permitting non-affine addrecs to be sent to LSR, which it isn't prepared to handle. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100839 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Analysis/IVUsers.cpp | 4 +- .../LoopStrengthReduce/insert-positions.ll | 69 +++++++++++++++++++ 2 files changed, 71 insertions(+), 2 deletions(-) create mode 100644 test/Transforms/LoopStrengthReduce/insert-positions.ll diff --git a/lib/Analysis/IVUsers.cpp b/lib/Analysis/IVUsers.cpp index 467f9dd840b..c821cc95ca1 100644 --- a/lib/Analysis/IVUsers.cpp +++ b/lib/Analysis/IVUsers.cpp @@ -73,8 +73,8 @@ static bool isInteresting(const SCEV *S, const Instruction *I, const Loop *L) { // An addrec is interesting if it's affine or if it has an interesting start. if (const SCEVAddRecExpr *AR = dyn_cast(S)) { // Keep things simple. Don't touch loop-variant strides. - if (AR->getLoop() == L && (AR->isAffine() || !L->contains(I))) - return true; + if (AR->getLoop() == L) + return AR->isAffine() || !L->contains(I); // Otherwise recurse to see if the start value is interesting. return isInteresting(AR->getStart(), I, L); } diff --git a/test/Transforms/LoopStrengthReduce/insert-positions.ll b/test/Transforms/LoopStrengthReduce/insert-positions.ll new file mode 100644 index 00000000000..1a695f35e3b --- /dev/null +++ b/test/Transforms/LoopStrengthReduce/insert-positions.ll @@ -0,0 +1,69 @@ +; RUN: llc < %s -march=x86-64 >/dev/null + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" + +define void @test0() nounwind { +if.end90.i.i: + br label %while.body.i.i221.i + +while.body.i.i221.i: ; preds = %while.cond.backedge.i.i.i, %if.end90.i.i + br i1 undef, label %if.then.i.i224.i, label %while.cond.backedge.i.i.i + +while.cond.backedge.i.i.i: ; preds = %for.end.i.i.i, %while.body.i.i221.i + br label %while.body.i.i221.i + +if.then.i.i224.i: ; preds = %while.body.i.i221.i + switch i32 undef, label %for.cond.i.i226.i [ + i32 92, label %sw.bb.i.i225.i + i32 34, label %sw.bb.i.i225.i + i32 110, label %sw.bb21.i.i.i + ] + +sw.bb.i.i225.i: ; preds = %if.then.i.i224.i, %if.then.i.i224.i + unreachable + +sw.bb21.i.i.i: ; preds = %if.then.i.i224.i + unreachable + +for.cond.i.i226.i: ; preds = %for.body.i.i.i, %if.then.i.i224.i + %0 = phi i64 [ %tmp154.i.i.i, %for.body.i.i.i ], [ 0, %if.then.i.i224.i ] ; [#uses=2] + %tmp154.i.i.i = add i64 %0, 1 ; [#uses=2] + %i.0.i.i.i = trunc i64 %0 to i32 ; [#uses=1] + br i1 undef, label %land.rhs.i.i.i, label %for.end.i.i.i + +land.rhs.i.i.i: ; preds = %for.cond.i.i226.i + br i1 undef, label %for.body.i.i.i, label %for.end.i.i.i + +for.body.i.i.i: ; preds = %land.rhs.i.i.i + br label %for.cond.i.i226.i + +for.end.i.i.i: ; preds = %land.rhs.i.i.i, %for.cond.i.i226.i + %idx.ext.i.i.i = sext i32 %i.0.i.i.i to i64 ; [#uses=1] + %sub.ptr72.sum.i.i.i = xor i64 %idx.ext.i.i.i, -1 ; [#uses=1] + %pos.addr.1.sum155.i.i.i = add i64 %tmp154.i.i.i, %sub.ptr72.sum.i.i.i ; [#uses=1] + %arrayidx76.i.i.i = getelementptr inbounds i8* undef, i64 %pos.addr.1.sum155.i.i.i ; [#uses=0] + br label %while.cond.backedge.i.i.i +} + +define void @test1() nounwind { +entry: + %t = shl i32 undef, undef ; [#uses=1] + %t9 = sub nsw i32 0, %t ; [#uses=1] + br label %outer + +outer: ; preds = %bb18, %bb + %i12 = phi i32 [ %t21, %bb18 ], [ 0, %entry ] ; [#uses=2] + %i13 = phi i32 [ %t20, %bb18 ], [ 0, %entry ] ; [#uses=2] + br label %inner + +inner: ; preds = %bb16, %bb11 + %t17 = phi i32 [ %i13, %outer ], [ undef, %inner ] ; [#uses=1] + store i32 %t17, i32* undef + br i1 undef, label %bb18, label %inner + +bb18: ; preds = %bb16 + %t19 = add i32 %i13, %t9 ; [#uses=1] + %t20 = add i32 %t19, %i12 ; [#uses=1] + %t21 = add i32 %i12, 1 ; [#uses=1] + br label %outer +}