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80-col cleanups.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132863 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2011-06-10 23:05:08 +00:00
parent 9a09ca348f
commit b3e009a165
1 changed files with 5 additions and 6 deletions
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11
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
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@ -573,9 +573,9 @@ SDValue DAGTypeLegalizer::PromoteIntRes_XMULO(SDNode *N, unsigned ResNo) {
DebugLoc DL = N->getDebugLoc();
EVT SmallVT = LHS.getValueType();
// To determine if the result overflowed in a larger type, we extend the input
// to the larger type, do the multiply, then check the high bits of the result
// to see if the overflow happened.
// To determine if the result overflowed in a larger type, we extend the
// input to the larger type, do the multiply, then check the high bits of
// the result to see if the overflow happened.
if (N->getOpcode() == ISD::SMULO) {
LHS = SExtPromotedInteger(LHS);
RHS = SExtPromotedInteger(RHS);
@ -585,8 +585,8 @@ SDValue DAGTypeLegalizer::PromoteIntRes_XMULO(SDNode *N, unsigned ResNo) {
}
SDValue Mul = DAG.getNode(ISD::MUL, DL, LHS.getValueType(), LHS, RHS);
// Overflow occurred iff the high part of the result does not zero/sign-extend
// the low part.
// Overflow occurred iff the high part of the result does not
// zero/sign-extend the low part.
SDValue Overflow;
if (N->getOpcode() == ISD::UMULO) {
// Unsigned overflow occurred iff the high part is non-zero.
@ -2789,4 +2789,3 @@ SDValue DAGTypeLegalizer::PromoteIntOp_CONCAT_VECTORS(SDNode *N) {
return DAG.getNode(ISD::BUILD_VECTOR, dl, N->getValueType(0),
&NewOps[0], NewOps.size());
}