From b3e0a6d75c60f01df4fcee4b4309f06ce92a96c9 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Sat, 10 May 2008 00:17:50 +0000 Subject: [PATCH] If all sources of a PHI node are defined by an implicit_def, just emit an implicit_def instead of a copy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50927 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/PHIElimination.cpp | 18 +++++++++------- test/CodeGen/X86/2008-05-09-PHIElimBug.ll | 25 +++++++++++++++++++++++ 2 files changed, 36 insertions(+), 7 deletions(-) create mode 100644 test/CodeGen/X86/2008-05-09-PHIElimBug.ll diff --git a/lib/CodeGen/PHIElimination.cpp b/lib/CodeGen/PHIElimination.cpp index a82e78e5a0d..8b1f3078709 100644 --- a/lib/CodeGen/PHIElimination.cpp +++ b/lib/CodeGen/PHIElimination.cpp @@ -127,11 +127,15 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { return true; } -static bool isSourceDefinedByImplicitDef(MachineInstr *MPhi, unsigned SrcIdx, +static bool isSourceDefinedByImplicitDef(MachineInstr *MPhi, MachineRegisterInfo *MRI) { - unsigned SrcReg = MPhi->getOperand(SrcIdx*2+1).getReg(); - MachineInstr *DefMI = MRI->getVRegDef(SrcReg); - return DefMI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF; + for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) { + unsigned SrcReg = MPhi->getOperand(i).getReg(); + MachineInstr *DefMI = MRI->getVRegDef(SrcReg); + if (!DefMI || DefMI->getOpcode() != TargetInstrInfo::IMPLICIT_DEF) + return false; + } + return true; } /// LowerAtomicPHINode - Lower the PHI node at the top of the specified block, @@ -156,9 +160,9 @@ void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB, // into the phi node destination. // const TargetInstrInfo *TII = MF.getTarget().getInstrInfo(); - if (NumSrcs == 1 && isSourceDefinedByImplicitDef(MPhi, 0, MRI)) - // If the only source of a PHI node is an implicit_def, just emit an - // implicit_def instead of a copy. + if (isSourceDefinedByImplicitDef(MPhi, MRI)) + // If all sources of a PHI node are implicit_def, just emit an implicit_def + // instead of a copy. BuildMI(MBB, AfterPHIsIt, TII->get(TargetInstrInfo::IMPLICIT_DEF), DestReg); else TII->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC, RC); diff --git a/test/CodeGen/X86/2008-05-09-PHIElimBug.ll b/test/CodeGen/X86/2008-05-09-PHIElimBug.ll new file mode 100644 index 00000000000..c0b19611313 --- /dev/null +++ b/test/CodeGen/X86/2008-05-09-PHIElimBug.ll @@ -0,0 +1,25 @@ +; RUN: llvm-as < %s | llc -march=x86 + + %struct.V = type { <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x i32>, float*, float*, float*, float*, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, i32, i32, i32, i32, i32, i32, i32, i32 } + +define fastcc void @t() nounwind { +entry: + br i1 false, label %bb23816.preheader, label %bb23821 + +bb23816.preheader: ; preds = %entry + %tmp23735 = and i32 0, 2 ; [#uses=0] + br label %bb23830 + +bb23821: ; preds = %entry + br i1 false, label %bb23830, label %bb23827 + +bb23827: ; preds = %bb23821 + %tmp23829 = getelementptr %struct.V* null, i32 0, i32 42 ; [#uses=0] + br label %bb23830 + +bb23830: ; preds = %bb23827, %bb23821, %bb23816.preheader + %scaledInDst.2.reg2mem.5 = phi i8 [ undef, %bb23827 ], [ undef, %bb23821 ], [ undef, %bb23816.preheader ] ; [#uses=1] + %toBool35047 = icmp eq i8 %scaledInDst.2.reg2mem.5, 0 ; [#uses=1] + %bothcond39107 = or i1 %toBool35047, false ; [#uses=0] + unreachable +}