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Move MipsJITInfo to the subtarget rather than the target machine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212151 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -85,7 +85,7 @@ MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
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InMips16Mode(false), InMips16HardFloat(Mips16HardFloat),
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InMips16Mode(false), InMips16HardFloat(Mips16HardFloat),
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InMicroMipsMode(false), HasDSP(false), HasDSPR2(false),
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InMicroMipsMode(false), HasDSP(false), HasDSPR2(false),
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AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16), HasMSA(false),
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AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16), HasMSA(false),
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RM(_RM), OverrideMode(NoOverride), TM(_TM), TargetTriple(TT) {
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RM(_RM), OverrideMode(NoOverride), TM(_TM), TargetTriple(TT), JITInfo() {
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std::string CPUName = CPU;
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std::string CPUName = CPU;
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CPUName = selectMipsCPU(TT, CPUName);
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CPUName = selectMipsCPU(TT, CPUName);
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@ -14,6 +14,7 @@
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#ifndef MIPSSUBTARGET_H
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#ifndef MIPSSUBTARGET_H
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#define MIPSSUBTARGET_H
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#define MIPSSUBTARGET_H
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#include "MipsJITInfo.h"
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#include "llvm/MC/MCInstrItineraries.h"
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#include "llvm/MC/MCInstrItineraries.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Target/TargetSubtargetInfo.h"
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#include "llvm/Target/TargetSubtargetInfo.h"
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@ -132,6 +133,8 @@ protected:
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MipsTargetMachine *TM;
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MipsTargetMachine *TM;
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Triple TargetTriple;
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Triple TargetTriple;
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MipsJITInfo JITInfo;
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public:
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public:
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bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
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bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
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AntiDepBreakMode& Mode,
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AntiDepBreakMode& Mode,
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@ -248,6 +251,8 @@ public:
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/// specify which component of the system provides it. Hardware, software, and
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/// specify which component of the system provides it. Hardware, software, and
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/// hybrid implementations are all valid.
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/// hybrid implementations are all valid.
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bool systemSupportsUnalignedAccess() const { return hasMips32r6(); }
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bool systemSupportsUnalignedAccess() const { return hasMips32r6(); }
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MipsJITInfo *getJITInfo() { return &JITInfo; }
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};
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};
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} // End llvm namespace
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} // End llvm namespace
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@ -89,7 +89,7 @@ MipsTargetMachine::MipsTargetMachine(const Target &T, StringRef TT,
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Subtarget(TT, CPU, FS, isLittle, RM, this),
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Subtarget(TT, CPU, FS, isLittle, RM, this),
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DL(computeDataLayout(Subtarget)), InstrInfo(MipsInstrInfo::create(*this)),
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DL(computeDataLayout(Subtarget)), InstrInfo(MipsInstrInfo::create(*this)),
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FrameLowering(MipsFrameLowering::create(*this, Subtarget)),
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FrameLowering(MipsFrameLowering::create(*this, Subtarget)),
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TLInfo(MipsTargetLowering::create(*this)), TSInfo(DL), JITInfo() {
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TLInfo(MipsTargetLowering::create(*this)), TSInfo(DL) {
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initAsmInfo();
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initAsmInfo();
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}
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}
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@ -17,7 +17,6 @@
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#include "MipsFrameLowering.h"
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#include "MipsFrameLowering.h"
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#include "MipsISelLowering.h"
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#include "MipsISelLowering.h"
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#include "MipsInstrInfo.h"
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#include "MipsInstrInfo.h"
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#include "MipsJITInfo.h"
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#include "MipsSelectionDAGInfo.h"
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#include "MipsSelectionDAGInfo.h"
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#include "MipsSubtarget.h"
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#include "MipsSubtarget.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/Passes.h"
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@ -43,7 +42,6 @@ class MipsTargetMachine : public LLVMTargetMachine {
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std::unique_ptr<const MipsFrameLowering> FrameLoweringSE;
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std::unique_ptr<const MipsFrameLowering> FrameLoweringSE;
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std::unique_ptr<const MipsTargetLowering> TLInfoSE;
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std::unique_ptr<const MipsTargetLowering> TLInfoSE;
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MipsSelectionDAGInfo TSInfo;
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MipsSelectionDAGInfo TSInfo;
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MipsJITInfo JITInfo;
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public:
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public:
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MipsTargetMachine(const Target &T, StringRef TT,
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MipsTargetMachine(const Target &T, StringRef TT,
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@ -71,7 +69,9 @@ public:
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: &getSubtargetImpl()->getInstrItineraryData();
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: &getSubtargetImpl()->getInstrItineraryData();
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}
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}
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MipsJITInfo *getJITInfo() override { return &JITInfo; }
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MipsJITInfo *getJITInfo() override {
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return Subtarget.getJITInfo();
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}
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const MipsRegisterInfo *getRegisterInfo() const override {
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const MipsRegisterInfo *getRegisterInfo() const override {
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return &InstrInfo->getRegisterInfo();
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return &InstrInfo->getRegisterInfo();
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