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Remove special-casing of return blocks for liveness.

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Now that return value registers are return instruction uses, there is no
need for special treatment of return blocks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174416 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
2013-02-05 18:21:52 +00:00
parent baa3c50a7b
commit b45e4deb10
6 changed files with 7 additions and 142 deletions
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lib/CodeGen/RegAllocFast.cpp
-57
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@@ -177,7 +177,6 @@ namespace {
unsigned VirtReg, unsigned Hint);
void spillAll(MachineBasicBlock::iterator MI);
bool setPhysReg(MachineInstr *MI, unsigned OpNum, unsigned PhysReg);
void addRetOperands(MachineBasicBlock *MBB);
};
char RAFast::ID = 0;
}
@@ -774,59 +773,6 @@ void RAFast::handleThroughOperands(MachineInstr *MI,
UsedInInstr.insert(PartialDefs[i]);
}
/// addRetOperand - ensure that a return instruction has an operand for each
/// value live out of the function.
///
/// Things marked both call and return are tail calls; do not do this for them.
/// The tail callee need not take the same registers as input that it produces
/// as output, and there are dependencies for its input registers elsewhere.
///
/// FIXME: This should be done as part of instruction selection, and this helper
/// should be deleted. Until then, we use custom logic here to create the proper
/// operand under all circumstances. We can't use addRegisterKilled because that
/// doesn't make sense for undefined values. We can't simply avoid calling it
/// for undefined values, because we must ensure that the operand always exists.
void RAFast::addRetOperands(MachineBasicBlock *MBB) {
if (MBB->empty() || !MBB->back().isReturn() || MBB->back().isCall())
return;
MachineInstr *MI = &MBB->back();
for (MachineRegisterInfo::liveout_iterator
I = MBB->getParent()->getRegInfo().liveout_begin(),
E = MBB->getParent()->getRegInfo().liveout_end(); I != E; ++I) {
unsigned Reg = *I;
assert(TargetRegisterInfo::isPhysicalRegister(Reg) &&
"Cannot have a live-out virtual register.");
bool hasDef = PhysRegState[Reg] == regReserved;
// Check if this register already has an operand.
bool Found = false;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
if (!MO.isReg() || !MO.isUse())
continue;
unsigned OperReg = MO.getReg();
if (!TargetRegisterInfo::isPhysicalRegister(OperReg))
continue;
if (OperReg == Reg || TRI->isSuperRegister(OperReg, Reg)) {
// If the ret already has an operand for this physreg or a superset,
// don't duplicate it. Set the kill flag if the value is defined.
if (hasDef && !MO.isKill())
MO.setIsKill();
Found = true;
break;
}
}
if (!Found)
MachineInstrBuilder(*MF, MI)
.addReg(Reg, llvm::RegState::Implicit | getKillRegState(hasDef));
}
}
void RAFast::AllocateBasicBlock() {
DEBUG(dbgs() << "\nAllocating " << *MBB);
@@ -1109,9 +1055,6 @@ void RAFast::AllocateBasicBlock() {
MBB->erase(Coalesced[i]);
NumCopies += Coalesced.size();
// addRetOperands must run after we've seen all defs in this block.
addRetOperands(MBB);
DEBUG(MBB->dump());
}