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Teach ShrinkDemandedConstant how to handle X+C. This implements:
add.ll:test33, add.ll:test34, shift-sra.ll:test2 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31586 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1117,6 +1117,97 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, uint64_t DemandedMask,
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}
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break;
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}
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case Instruction::Add:
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// If there is a constant on the RHS, there are a variety of xformations
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// we can do.
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if (ConstantInt *RHS = dyn_cast<ConstantInt>(I->getOperand(1))) {
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// If null, this should be simplified elsewhere. Some of the xforms here
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// won't work if the RHS is zero.
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if (RHS->isNullValue())
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break;
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// Figure out what the input bits are. If the top bits of the and result
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// are not demanded, then the add doesn't demand them from its input
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// either.
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// Shift the demanded mask up so that it's at the top of the uint64_t.
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unsigned BitWidth = I->getType()->getPrimitiveSizeInBits();
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unsigned NLZ = CountLeadingZeros_64(DemandedMask << (64-BitWidth));
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// If the top bit of the output is demanded, demand everything from the
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// input. Otherwise, we demand all the input bits except NLZ top bits.
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uint64_t InDemandedBits = ~0ULL >> 64-BitWidth+NLZ;
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// Find information about known zero/one bits in the input.
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if (SimplifyDemandedBits(I->getOperand(0), InDemandedBits,
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KnownZero2, KnownOne2, Depth+1))
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return true;
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// If the RHS of the add has bits set that can't affect the input, reduce
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// the constant.
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if (ShrinkDemandedConstant(I, 1, InDemandedBits))
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return UpdateValueUsesWith(I, I);
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// Avoid excess work.
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if (KnownZero2 == 0 && KnownOne2 == 0)
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break;
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// Turn it into OR if input bits are zero.
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if ((KnownZero2 & RHS->getZExtValue()) == RHS->getZExtValue()) {
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Instruction *Or =
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BinaryOperator::createOr(I->getOperand(0), I->getOperand(1),
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I->getName());
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InsertNewInstBefore(Or, *I);
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return UpdateValueUsesWith(I, Or);
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}
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// We can say something about the output known-zero and known-one bits,
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// depending on potential carries from the input constant and the
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// unknowns. For example if the LHS is known to have at most the 0x0F0F0
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// bits set and the RHS constant is 0x01001, then we know we have a known
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// one mask of 0x00001 and a known zero mask of 0xE0F0E.
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// To compute this, we first compute the potential carry bits. These are
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// the bits which may be modified. I'm not aware of a better way to do
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// this scan.
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uint64_t RHSVal = RHS->getZExtValue();
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bool CarryIn = false;
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uint64_t CarryBits = 0;
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uint64_t CurBit = 1;
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for (unsigned i = 0; i != BitWidth; ++i, CurBit <<= 1) {
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// Record the current carry in.
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if (CarryIn) CarryBits |= CurBit;
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bool CarryOut;
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// This bit has a carry out unless it is "zero + zero" or
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// "zero + anything" with no carry in.
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if ((KnownZero2 & CurBit) && ((RHSVal & CurBit) == 0)) {
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CarryOut = false; // 0 + 0 has no carry out, even with carry in.
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} else if (!CarryIn &&
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((KnownZero2 & CurBit) || ((RHSVal & CurBit) == 0))) {
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CarryOut = false; // 0 + anything has no carry out if no carry in.
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} else {
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// Otherwise, we have to assume we have a carry out.
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CarryOut = true;
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}
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// This stage's carry out becomes the next stage's carry-in.
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CarryIn = CarryOut;
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}
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// Now that we know which bits have carries, compute the known-1/0 sets.
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// Bits are known one if they are known zero in one operand and one in the
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// other, and there is no input carry.
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KnownOne = ((KnownZero2 & RHSVal) | (KnownOne2 & ~RHSVal)) & ~CarryBits;
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// Bits are known zero if they are known zero in both operands and there
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// is no input carry.
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KnownZero = KnownZero2 & ~RHSVal & ~CarryBits;
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}
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break;
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case Instruction::Shl:
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if (ConstantInt *SA = dyn_cast<ConstantInt>(I->getOperand(1))) {
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uint64_t ShiftAmt = SA->getZExtValue();
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@ -1685,11 +1776,19 @@ Instruction *InstCombiner::visitAdd(BinaryOperator &I) {
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return ReplaceInstUsesWith(I, LHS);
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}
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// X + (signbit) --> X ^ signbit
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if (ConstantInt *CI = dyn_cast<ConstantInt>(RHSC)) {
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// X + (signbit) --> X ^ signbit
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uint64_t Val = CI->getZExtValue();
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if (Val == (1ULL << (CI->getType()->getPrimitiveSizeInBits()-1)))
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return BinaryOperator::createXor(LHS, RHS);
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// See if SimplifyDemandedBits can simplify this. This handles stuff like
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// (X & 254)+1 -> (X&254)|1
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uint64_t KnownZero, KnownOne;
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if (!isa<PackedType>(I.getType()) &&
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SimplifyDemandedBits(&I, I.getType()->getIntegralTypeMask(),
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KnownZero, KnownOne))
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return &I;
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}
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if (isa<PHINode>(LHS))
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