6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-07-24 22:24:54 +00:00
Code Issues Projects Releases Wiki Activity

[SystemZ] Add CodeGen test cases

Browse Source 
This adds all CodeGen tests for the SystemZ target.

This version of the patch incorporates feedback from a review by
Sean Silva.  Thanks to all reviewers!

Patch by Richard Sandiford.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181204 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Ulrich Weigand
2013-05-06 16:17:29 +00:00
parent 1d09d56fe1
commit b503b49b51
296 changed files with 31125 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

78
test/CodeGen/SystemZ/int-cmp-43.ll Normal file
View File

@@ -0,0 +1,78 @@
; Test 64-bit comparisons in which the second operand is a PC-relative
; variable.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
@g = global i64 1
; Check signed comparisons.
define i64 @f1(i64 %src1) {
; CHECK: f1:
; CHECK: cgrl %r2, g
; CHECK-NEXT: j{{g?}}l
; CHECK: br %r14
entry:
%src2 = load i64 *@g
%cond = icmp slt i64 %src1, %src2
br i1 %cond, label %exit, label %mulb
mulb:
%mul = mul i64 %src1, %src1
br label %exit
exit:
%res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
ret i64 %res
}
; Check unsigned comparisons.
define i64 @f2(i64 %src1) {
; CHECK: f2:
; CHECK: clgrl %r2, g
; CHECK-NEXT: j{{g?}}l
; CHECK: br %r14
entry:
%src2 = load i64 *@g
%cond = icmp ult i64 %src1, %src2
br i1 %cond, label %exit, label %mulb
mulb:
%mul = mul i64 %src1, %src1
br label %exit
exit:
%res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
ret i64 %res
}
; Check equality, which can use CRL or CLRL.
define i64 @f3(i64 %src1) {
; CHECK: f3:
; CHECK: c{{l?}}grl %r2, g
; CHECK-NEXT: j{{g?}}e
; CHECK: br %r14
entry:
%src2 = load i64 *@g
%cond = icmp eq i64 %src1, %src2
br i1 %cond, label %exit, label %mulb
mulb:
%mul = mul i64 %src1, %src1
br label %exit
exit:
%res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
ret i64 %res
}
; ...likewise inequality.
define i64 @f4(i64 %src1) {
; CHECK: f4:
; CHECK: c{{l?}}grl %r2, g
; CHECK-NEXT: j{{g?}}lh
; CHECK: br %r14
entry:
%src2 = load i64 *@g
%cond = icmp ne i64 %src1, %src2
br i1 %cond, label %exit, label %mulb
mulb:
%mul = mul i64 %src1, %src1
br label %exit
exit:
%res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
ret i64 %res
}