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Steal bits from the asm string index to use for operand information. On both
x86 and ppc, this gets us 4 more bits to play with, since the string indices both only use 12 bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29180 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -457,8 +457,7 @@ void AsmWriterEmitter::run(std::ostream &O) {
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// To reduce code size, we compactify common instructions into a few bits
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// in the opcode-indexed table.
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// 16 bits to play with.
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unsigned BitsLeft = 16;
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unsigned BitsLeft = 32-AsmStrBits;
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std::vector<std::vector<std::string> > TableDrivenOperandPrinters;
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@ -501,7 +500,7 @@ void AsmWriterEmitter::run(std::ostream &O) {
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O<<" static const unsigned OpInfo[] = {\n";
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for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) {
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O << " " << OpcodeInfo[i] << ",\t// "
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O << " " << OpcodeInfo[i] << "U,\t// "
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<< NumberedInstructions[i]->TheDef->getName() << "\n";
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}
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// Add a dummy entry so the array init doesn't end with a comma.
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@ -548,7 +547,7 @@ void AsmWriterEmitter::run(std::ostream &O) {
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<< " O << AsmStrs+(Bits & " << (1 << AsmStrBits)-1 << ");\n\n";
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// Output the table driven operand information.
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BitsLeft = 16;
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BitsLeft = 32-AsmStrBits;
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for (unsigned i = 0, e = TableDrivenOperandPrinters.size(); i != e; ++i) {
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std::vector<std::string> &Commands = TableDrivenOperandPrinters[i];
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@ -595,12 +594,15 @@ void AsmWriterEmitter::run(std::ostream &O) {
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// elements in the vector.
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std::reverse(Instructions.begin(), Instructions.end());
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// Find the opcode # of inline asm
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if (!Instructions.empty()) {
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// Find the opcode # of inline asm.
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O << " switch (MI->getOpcode()) {\n";
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while (!Instructions.empty())
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EmitInstructions(Instructions, O);
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O << " }\n"
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" return true;\n"
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O << " }\n";
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}
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O << " return true;\n"
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"}\n";
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}
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