From b570599c8f048c2eda78edb9304bd8e283fb6908 Mon Sep 17 00:00:00 2001
From: Tom Stellard <thomas.stellard@amd.com>
Date: Mon, 18 Nov 2013 19:43:44 +0000
Subject: [PATCH] R600: Enable the IR structurizer by default

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195031 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/R600/AMDGPU.td               | 6 +++---
 lib/Target/R600/AMDGPUSubtarget.cpp     | 2 +-
 lib/Target/R600/AMDGPUTargetMachine.cpp | 3 +--
 test/CodeGen/R600/jump-address.ll       | 2 +-
 test/CodeGen/R600/predicates.ll         | 2 +-
 test/CodeGen/R600/structurize.ll        | 2 +-
 6 files changed, 8 insertions(+), 9 deletions(-)

diff --git a/lib/Target/R600/AMDGPU.td b/lib/Target/R600/AMDGPU.td
index 37ff6b143a0..182235b27c4 100644
--- a/lib/Target/R600/AMDGPU.td
+++ b/lib/Target/R600/AMDGPU.td
@@ -21,10 +21,10 @@ def FeatureDumpCode : SubtargetFeature <"DumpCode",
         "true",
         "Dump MachineInstrs in the CodeEmitter">;
 
-def FeatureIRStructurizer : SubtargetFeature <"enable-irstructurizer",
+def FeatureIRStructurizer : SubtargetFeature <"disable-irstructurizer",
         "EnableIRStructurizer",
-        "true",
-        "Enable IR Structurizer">;
+        "false",
+        "Disable IR Structurizer">;
 
 // Target features
 
diff --git a/lib/Target/R600/AMDGPUSubtarget.cpp b/lib/Target/R600/AMDGPUSubtarget.cpp
index 4e97e6e83bb..061793a68b9 100644
--- a/lib/Target/R600/AMDGPUSubtarget.cpp
+++ b/lib/Target/R600/AMDGPUSubtarget.cpp
@@ -36,7 +36,7 @@ AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS) :
   Gen = AMDGPUSubtarget::R600;
   FP64 = false;
   CaymanISA = false;
-  EnableIRStructurizer = false;
+  EnableIRStructurizer = true;
   EnableIfCvt = true;
   ParseSubtargetFeatures(GPU, FS);
   DevName = GPU;
diff --git a/lib/Target/R600/AMDGPUTargetMachine.cpp b/lib/Target/R600/AMDGPUTargetMachine.cpp
index 9186c9df3ab..bc4f5d720ae 100644
--- a/lib/Target/R600/AMDGPUTargetMachine.cpp
+++ b/lib/Target/R600/AMDGPUTargetMachine.cpp
@@ -125,8 +125,7 @@ bool
 AMDGPUPassConfig::addPreISel() {
   const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
   addPass(createFlattenCFGPass());
-  if (ST.IsIRStructurizerEnabled() ||
-      ST.getGeneration() > AMDGPUSubtarget::NORTHERN_ISLANDS)
+  if (ST.IsIRStructurizerEnabled())
     addPass(createStructurizeCFGPass());
   if (ST.getGeneration() > AMDGPUSubtarget::NORTHERN_ISLANDS) {
     addPass(createSinkingPass());
diff --git a/test/CodeGen/R600/jump-address.ll b/test/CodeGen/R600/jump-address.ll
index 26c298b9d81..ae9c8bba4fd 100644
--- a/test/CodeGen/R600/jump-address.ll
+++ b/test/CodeGen/R600/jump-address.ll
@@ -1,6 +1,6 @@
 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
 
-; CHECK: JUMP @5
+; CHECK: JUMP @3
 ; CHECK: EXPORT
 ; CHECK-NOT: EXPORT
 
diff --git a/test/CodeGen/R600/predicates.ll b/test/CodeGen/R600/predicates.ll
index 0d3eeef2630..902508ff9e0 100644
--- a/test/CodeGen/R600/predicates.ll
+++ b/test/CodeGen/R600/predicates.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
+; RUN: llc < %s -march=r600 -mattr=disable-irstructurizer -mcpu=redwood | FileCheck %s
 
 ; These tests make sure the compiler is optimizing branches using predicates
 ; when it is legal to do so.
diff --git a/test/CodeGen/R600/structurize.ll b/test/CodeGen/R600/structurize.ll
index b95561943c7..c2acd938ad0 100644
--- a/test/CodeGen/R600/structurize.ll
+++ b/test/CodeGen/R600/structurize.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
+; RUN: llc < %s -march=r600 -mcpu=redwood -mattr=disable-irstructurizer | FileCheck %s
 ; Test case for a crash in the AMDILCFGStructurizer from a CFG like this:
 ;
 ;                            entry