From b5923db192d2aa938ff3c12aaac87d80ab649625 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Sat, 11 Jun 2011 00:28:06 +0000 Subject: [PATCH] Move the list of registers into CodeGenRegBank. Also move the sub-register index computations from RegisterInfoEmitter into CodeGenRegBank. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132865 91177308-0d34-0410-b5e6-96231b3b80d8 --- utils/TableGen/CodeGenRegisters.cpp | 204 +++++++++++++++++++++++-- utils/TableGen/CodeGenRegisters.h | 64 ++++++-- utils/TableGen/CodeGenTarget.cpp | 15 +- utils/TableGen/CodeGenTarget.h | 5 +- utils/TableGen/RegisterInfoEmitter.cpp | 174 ++------------------- 5 files changed, 254 insertions(+), 208 deletions(-) diff --git a/utils/TableGen/CodeGenRegisters.cpp b/utils/TableGen/CodeGenRegisters.cpp index 22fc25b61a6..a4504e4f5e8 100644 --- a/utils/TableGen/CodeGenRegisters.cpp +++ b/utils/TableGen/CodeGenRegisters.cpp @@ -14,6 +14,7 @@ #include "CodeGenRegisters.h" #include "CodeGenTarget.h" +#include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringExtras.h" using namespace llvm; @@ -22,14 +23,111 @@ using namespace llvm; // CodeGenRegister //===----------------------------------------------------------------------===// -CodeGenRegister::CodeGenRegister(Record *R) : TheDef(R) { - CostPerUse = R->getValueAsInt("CostPerUse"); -} +CodeGenRegister::CodeGenRegister(Record *R, unsigned Enum) + : TheDef(R), + EnumValue(Enum), + CostPerUse(R->getValueAsInt("CostPerUse")), + SubRegsComplete(false) +{} const std::string &CodeGenRegister::getName() const { return TheDef->getName(); } +namespace { + struct Orphan { + CodeGenRegister *SubReg; + Record *First, *Second; + Orphan(CodeGenRegister *r, Record *a, Record *b) + : SubReg(r), First(a), Second(b) {} + }; +} + +const CodeGenRegister::SubRegMap & +CodeGenRegister::getSubRegs(CodeGenRegBank &RegBank) { + // Only compute this map once. + if (SubRegsComplete) + return SubRegs; + SubRegsComplete = true; + + std::vector SubList = TheDef->getValueAsListOfDefs("SubRegs"); + std::vector Indices = TheDef->getValueAsListOfDefs("SubRegIndices"); + if (SubList.size() != Indices.size()) + throw TGError(TheDef->getLoc(), "Register " + getName() + + " SubRegIndices doesn't match SubRegs"); + + // First insert the direct subregs and make sure they are fully indexed. + for (unsigned i = 0, e = SubList.size(); i != e; ++i) { + CodeGenRegister *SR = RegBank.getReg(SubList[i]); + if (!SubRegs.insert(std::make_pair(Indices[i], SR)).second) + throw TGError(TheDef->getLoc(), "SubRegIndex " + Indices[i]->getName() + + " appears twice in Register " + getName()); + } + + // Keep track of inherited subregs and how they can be reached. + SmallVector Orphans; + + // Clone inherited subregs and place duplicate entries on Orphans. + // Here the order is important - earlier subregs take precedence. + for (unsigned i = 0, e = SubList.size(); i != e; ++i) { + CodeGenRegister *SR = RegBank.getReg(SubList[i]); + const SubRegMap &Map = SR->getSubRegs(RegBank); + for (SubRegMap::const_iterator SI = Map.begin(), SE = Map.end(); SI != SE; + ++SI) + if (!SubRegs.insert(*SI).second) + Orphans.push_back(Orphan(SI->second, Indices[i], SI->first)); + } + + // Process the composites. + ListInit *Comps = TheDef->getValueAsListInit("CompositeIndices"); + for (unsigned i = 0, e = Comps->size(); i != e; ++i) { + DagInit *Pat = dynamic_cast(Comps->getElement(i)); + if (!Pat) + throw TGError(TheDef->getLoc(), "Invalid dag '" + + Comps->getElement(i)->getAsString() + + "' in CompositeIndices"); + DefInit *BaseIdxInit = dynamic_cast(Pat->getOperator()); + if (!BaseIdxInit || !BaseIdxInit->getDef()->isSubClassOf("SubRegIndex")) + throw TGError(TheDef->getLoc(), "Invalid SubClassIndex in " + + Pat->getAsString()); + + // Resolve list of subreg indices into R2. + CodeGenRegister *R2 = this; + for (DagInit::const_arg_iterator di = Pat->arg_begin(), + de = Pat->arg_end(); di != de; ++di) { + DefInit *IdxInit = dynamic_cast(*di); + if (!IdxInit || !IdxInit->getDef()->isSubClassOf("SubRegIndex")) + throw TGError(TheDef->getLoc(), "Invalid SubClassIndex in " + + Pat->getAsString()); + const SubRegMap &R2Subs = R2->getSubRegs(RegBank); + SubRegMap::const_iterator ni = R2Subs.find(IdxInit->getDef()); + if (ni == R2Subs.end()) + throw TGError(TheDef->getLoc(), "Composite " + Pat->getAsString() + + " refers to bad index in " + R2->getName()); + R2 = ni->second; + } + + // Insert composite index. Allow overriding inherited indices etc. + SubRegs[BaseIdxInit->getDef()] = R2; + + // R2 is no longer an orphan. + for (unsigned j = 0, je = Orphans.size(); j != je; ++j) + if (Orphans[j].SubReg == R2) + Orphans[j].SubReg = 0; + } + + // Now Orphans contains the inherited subregisters without a direct index. + // Create inferred indexes for all missing entries. + for (unsigned i = 0, e = Orphans.size(); i != e; ++i) { + Orphan &O = Orphans[i]; + if (!O.SubReg) + continue; + SubRegs[RegBank.getCompositeSubRegIndex(O.First, O.Second, true)] = + O.SubReg; + } + return SubRegs; +} + //===----------------------------------------------------------------------===// // CodeGenRegisterClass //===----------------------------------------------------------------------===// @@ -104,19 +202,45 @@ const std::string &CodeGenRegisterClass::getName() const { //===----------------------------------------------------------------------===// CodeGenRegBank::CodeGenRegBank(RecordKeeper &Records) : Records(Records) { - // Read in the user-defined (named) sub-register indices. More indices will - // be synthesized. + // Read in the user-defined (named) sub-register indices. + // More indices will be synthesized later. SubRegIndices = Records.getAllDerivedDefinitions("SubRegIndex"); std::sort(SubRegIndices.begin(), SubRegIndices.end(), LessRecord()); NumNamedIndices = SubRegIndices.size(); + + // Read in the register definitions. + std::vector Regs = Records.getAllDerivedDefinitions("Register"); + std::sort(Regs.begin(), Regs.end(), LessRecord()); + Registers.reserve(Regs.size()); + // Assign the enumeration values. + for (unsigned i = 0, e = Regs.size(); i != e; ++i) + Registers.push_back(CodeGenRegister(Regs[i], i + 1)); } -Record *CodeGenRegBank::getCompositeSubRegIndex(Record *A, Record *B) { +CodeGenRegister *CodeGenRegBank::getReg(Record *Def) { + if (Def2Reg.empty()) + for (unsigned i = 0, e = Registers.size(); i != e; ++i) + Def2Reg[Registers[i].TheDef] = &Registers[i]; + + if (CodeGenRegister *Reg = Def2Reg[Def]) + return Reg; + + throw TGError(Def->getLoc(), "Not a known Register!"); +} + +Record *CodeGenRegBank::getCompositeSubRegIndex(Record *A, Record *B, + bool create) { + // Look for an existing entry. + Record *&Comp = Composite[std::make_pair(A, B)]; + if (Comp || !create) + return Comp; + + // None exists, synthesize one. std::string Name = A->getName() + "_then_" + B->getName(); - Record *R = new Record(Name, SMLoc(), Records); - Records.addDef(R); - SubRegIndices.push_back(R); - return R; + Comp = new Record(Name, SMLoc(), Records); + Records.addDef(Comp); + SubRegIndices.push_back(Comp); + return Comp; } unsigned CodeGenRegBank::getSubRegIndexNo(Record *idx) { @@ -126,3 +250,63 @@ unsigned CodeGenRegBank::getSubRegIndexNo(Record *idx) { return (i - SubRegIndices.begin()) + 1; } +void CodeGenRegBank::computeComposites() { + // Precompute all sub-register maps. This will create Composite entries for + // all inferred sub-register indices. + for (unsigned i = 0, e = Registers.size(); i != e; ++i) + Registers[i].getSubRegs(*this); + + for (unsigned i = 0, e = Registers.size(); i != e; ++i) { + CodeGenRegister *Reg1 = &Registers[i]; + const CodeGenRegister::SubRegMap &SRM1 = Reg1->getSubRegs(*this); + for (CodeGenRegister::SubRegMap::const_iterator i1 = SRM1.begin(), + e1 = SRM1.end(); i1 != e1; ++i1) { + Record *Idx1 = i1->first; + CodeGenRegister *Reg2 = i1->second; + // Ignore identity compositions. + if (Reg1 == Reg2) + continue; + const CodeGenRegister::SubRegMap &SRM2 = Reg2->getSubRegs(*this); + // Try composing Idx1 with another SubRegIndex. + for (CodeGenRegister::SubRegMap::const_iterator i2 = SRM2.begin(), + e2 = SRM2.end(); i2 != e2; ++i2) { + std::pair IdxPair(Idx1, i2->first); + CodeGenRegister *Reg3 = i2->second; + // Ignore identity compositions. + if (Reg2 == Reg3) + continue; + // OK Reg1:IdxPair == Reg3. Find the index with Reg:Idx == Reg3. + for (CodeGenRegister::SubRegMap::const_iterator i1d = SRM1.begin(), + e1d = SRM1.end(); i1d != e1d; ++i1d) { + if (i1d->second == Reg3) { + std::pair Ins = + Composite.insert(std::make_pair(IdxPair, i1d->first)); + // Conflicting composition? Emit a warning but allow it. + if (!Ins.second && Ins.first->second != i1d->first) { + errs() << "Warning: SubRegIndex " << getQualifiedName(Idx1) + << " and " << getQualifiedName(IdxPair.second) + << " compose ambiguously as " + << getQualifiedName(Ins.first->second) << " or " + << getQualifiedName(i1d->first) << "\n"; + } + } + } + } + } + } + + // We don't care about the difference between (Idx1, Idx2) -> Idx2 and invalid + // compositions, so remove any mappings of that form. + for (CompositeMap::iterator i = Composite.begin(), e = Composite.end(); + i != e;) { + CompositeMap::iterator j = i; + ++i; + if (j->first.second == j->second) + Composite.erase(j); + } +} + +void CodeGenRegBank::computeDerivedInfo() { + computeComposites(); +} + diff --git a/utils/TableGen/CodeGenRegisters.h b/utils/TableGen/CodeGenRegisters.h index 0dba925afef..09341f00d00 100644 --- a/utils/TableGen/CodeGenRegisters.h +++ b/utils/TableGen/CodeGenRegisters.h @@ -15,24 +15,43 @@ #ifndef CODEGEN_REGISTERS_H #define CODEGEN_REGISTERS_H +#include "Record.h" #include "llvm/CodeGen/ValueTypes.h" #include "llvm/ADT/DenseMap.h" -#include -#include -#include #include +#include +#include +#include +#include namespace llvm { - class Record; - class RecordKeeper; + class CodeGenRegBank; /// CodeGenRegister - Represents a register definition. struct CodeGenRegister { Record *TheDef; - const std::string &getName() const; unsigned EnumValue; unsigned CostPerUse; - CodeGenRegister(Record *R); + + // Map SubRegIndex -> Register. + typedef std::map SubRegMap; + + CodeGenRegister(Record *R, unsigned Enum); + + const std::string &getName() const; + + // Get a map of sub-registers computed lazily. + // This includes unique entries for all sub-sub-registers. + const SubRegMap &getSubRegs(CodeGenRegBank&); + + const SubRegMap &getSubRegs() const { + assert(SubRegsComplete && "Must precompute sub-registers"); + return SubRegs; + } + + private: + bool SubRegsComplete; + SubRegMap SubRegs; }; @@ -104,26 +123,41 @@ namespace llvm { // them. class CodeGenRegBank { RecordKeeper &Records; - - // Sub-register indices. The first NumNamedIndices are defined by the user - // in the .td files. The rest are synthesized such that all sub-registers - // have a unique name. std::vector SubRegIndices; - unsigned NumNamedIndices; + std::vector Registers; + DenseMap Def2Reg; + + // Composite SubRegIndex instances. + // Map (SubRegIndex, SubRegIndex) -> SubRegIndex. + typedef DenseMap, Record*> CompositeMap; + CompositeMap Composite; + + // Populate the Composite map from sub-register relationships. + void computeComposites(); public: CodeGenRegBank(RecordKeeper&); + // Sub-register indices. The first NumNamedIndices are defined by the user + // in the .td files. The rest are synthesized such that all sub-registers + // have a unique name. const std::vector &getSubRegIndices() { return SubRegIndices; } - unsigned getNumNamedIndices() { return NumNamedIndices; } // Map a SubRegIndex Record to its enum value. unsigned getSubRegIndexNo(Record *idx); - // Create a new sub-register index representing the A+B composition. - Record *getCompositeSubRegIndex(Record *A, Record *B); + // Find or create a sub-register index representing the A+B composition. + Record *getCompositeSubRegIndex(Record *A, Record *B, bool create = false); + + const std::vector &getRegisters() { return Registers; } + + // Find a register from its Record def. + CodeGenRegister *getReg(Record*); + + // Computed derived records such as missing sub-register indices. + void computeDerivedInfo(); }; } diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp index e337b564063..a0c64ffa8c0 100644 --- a/utils/TableGen/CodeGenTarget.cpp +++ b/utils/TableGen/CodeGenTarget.cpp @@ -163,19 +163,6 @@ CodeGenRegBank &CodeGenTarget::getRegBank() const { return *RegBank; } -void CodeGenTarget::ReadRegisters() const { - std::vector Regs = Records.getAllDerivedDefinitions("Register"); - if (Regs.empty()) - throw std::string("No 'Register' subclasses defined!"); - std::sort(Regs.begin(), Regs.end(), LessRecord()); - - Registers.reserve(Regs.size()); - Registers.assign(Regs.begin(), Regs.end()); - // Assign the enumeration values. - for (unsigned i = 0, e = Registers.size(); i != e; ++i) - Registers[i].EnumValue = i + 1; -} - void CodeGenTarget::ReadRegisterClasses() const { std::vector RegClasses = Records.getAllDerivedDefinitions("RegisterClass"); @@ -189,7 +176,7 @@ void CodeGenTarget::ReadRegisterClasses() const { /// getRegisterByName - If there is a register with the specific AsmName, /// return it. const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const { - const std::vector &Regs = getRegisters(); + const std::vector &Regs = getRegBank().getRegisters(); for (unsigned i = 0, e = Regs.size(); i != e; ++i) { const CodeGenRegister &Reg = Regs[i]; if (Reg.TheDef->getValueAsString("AsmName") == Name) diff --git a/utils/TableGen/CodeGenTarget.h b/utils/TableGen/CodeGenTarget.h index 86050fb7fa9..1f1c34cb989 100644 --- a/utils/TableGen/CodeGenTarget.h +++ b/utils/TableGen/CodeGenTarget.h @@ -66,10 +66,8 @@ class CodeGenTarget { mutable DenseMap Instructions; mutable CodeGenRegBank *RegBank; - mutable std::vector Registers; mutable std::vector RegisterClasses; mutable std::vector LegalValueTypes; - void ReadRegisters() const; void ReadRegisterClasses() const; void ReadInstructions() const; void ReadLegalValueTypes() const; @@ -101,8 +99,7 @@ public: CodeGenRegBank &getRegBank() const; const std::vector &getRegisters() const { - if (Registers.empty()) ReadRegisters(); - return Registers; + return getRegBank().getRegisters(); } /// getRegisterByName - If there is a register with the specific AsmName, diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp index 27835b7b23e..5a441e285e0 100644 --- a/utils/TableGen/RegisterInfoEmitter.cpp +++ b/utils/TableGen/RegisterInfoEmitter.cpp @@ -168,159 +168,6 @@ static void addSubSuperReg(Record *R, Record *S, addSubSuperReg(R, *I, SubRegs, SuperRegs, Aliases); } -struct RegisterMaps { - // Map SubRegIndex -> Register - typedef std::map SubRegMap; - // Map Register -> SubRegMap - typedef std::map SubRegMaps; - - SubRegMaps SubReg; - SubRegMap &inferSubRegIndices(Record *Reg, CodeGenTarget &); - - // Composite SubRegIndex instances. - // Map (SubRegIndex,SubRegIndex) -> SubRegIndex - typedef DenseMap,Record*> CompositeMap; - CompositeMap Composite; - - // Compute SubRegIndex compositions after inferSubRegIndices has run on all - // registers. - void computeComposites(); -}; - -// Calculate all subregindices for Reg. Loopy subregs cause infinite recursion. -RegisterMaps::SubRegMap &RegisterMaps::inferSubRegIndices(Record *Reg, - CodeGenTarget &Target) { - SubRegMap &SRM = SubReg[Reg]; - if (!SRM.empty()) - return SRM; - std::vector SubRegs = Reg->getValueAsListOfDefs("SubRegs"); - std::vector Indices = Reg->getValueAsListOfDefs("SubRegIndices"); - if (SubRegs.size() != Indices.size()) - throw "Register " + Reg->getName() + " SubRegIndices doesn't match SubRegs"; - - // First insert the direct subregs and make sure they are fully indexed. - for (unsigned i = 0, e = SubRegs.size(); i != e; ++i) { - if (!SRM.insert(std::make_pair(Indices[i], SubRegs[i])).second) - throw "SubRegIndex " + Indices[i]->getName() - + " appears twice in Register " + Reg->getName(); - inferSubRegIndices(SubRegs[i], Target); - } - - // Keep track of inherited subregs and how they can be reached. - // Register -> (SubRegIndex, SubRegIndex) - typedef std::map, LessRecord> OrphanMap; - OrphanMap Orphans; - - // Clone inherited subregs. Here the order is important - earlier subregs take - // precedence. - for (unsigned i = 0, e = SubRegs.size(); i != e; ++i) { - SubRegMap &M = SubReg[SubRegs[i]]; - for (SubRegMap::iterator si = M.begin(), se = M.end(); si != se; ++si) - if (!SRM.insert(*si).second) - Orphans[si->second] = std::make_pair(Indices[i], si->first); - } - - // Finally process the composites. - ListInit *Comps = Reg->getValueAsListInit("CompositeIndices"); - for (unsigned i = 0, e = Comps->size(); i != e; ++i) { - DagInit *Pat = dynamic_cast(Comps->getElement(i)); - if (!Pat) - throw "Invalid dag '" + Comps->getElement(i)->getAsString() - + "' in CompositeIndices"; - DefInit *BaseIdxInit = dynamic_cast(Pat->getOperator()); - if (!BaseIdxInit || !BaseIdxInit->getDef()->isSubClassOf("SubRegIndex")) - throw "Invalid SubClassIndex in " + Pat->getAsString(); - - // Resolve list of subreg indices into R2. - Record *R2 = Reg; - for (DagInit::const_arg_iterator di = Pat->arg_begin(), - de = Pat->arg_end(); di != de; ++di) { - DefInit *IdxInit = dynamic_cast(*di); - if (!IdxInit || !IdxInit->getDef()->isSubClassOf("SubRegIndex")) - throw "Invalid SubClassIndex in " + Pat->getAsString(); - SubRegMap::const_iterator ni = SubReg[R2].find(IdxInit->getDef()); - if (ni == SubReg[R2].end()) - throw "Composite " + Pat->getAsString() + " refers to bad index in " - + R2->getName(); - R2 = ni->second; - } - - // Insert composite index. Allow overriding inherited indices etc. - SRM[BaseIdxInit->getDef()] = R2; - - // R2 is now directly addressable, no longer an orphan. - Orphans.erase(R2); - } - - // Now Orphans contains the inherited subregisters without a direct index. - // Create inferred indexes for all missing entries. - for (OrphanMap::iterator I = Orphans.begin(), E = Orphans.end(); I != E; - ++I) { - Record *&Comp = Composite[I->second]; - if (!Comp) - Comp = Target.getRegBank().getCompositeSubRegIndex(I->second.first, - I->second.second); - SRM[Comp] = I->first; - } - - return SRM; -} - -void RegisterMaps::computeComposites() { - for (SubRegMaps::const_iterator sri = SubReg.begin(), sre = SubReg.end(); - sri != sre; ++sri) { - Record *Reg1 = sri->first; - const SubRegMap &SRM1 = sri->second; - for (SubRegMap::const_iterator i1 = SRM1.begin(), e1 = SRM1.end(); - i1 != e1; ++i1) { - Record *Idx1 = i1->first; - Record *Reg2 = i1->second; - // Ignore identity compositions. - if (Reg1 == Reg2) - continue; - // If Reg2 has no subregs, Idx1 doesn't compose. - if (!SubReg.count(Reg2)) - continue; - const SubRegMap &SRM2 = SubReg[Reg2]; - // Try composing Idx1 with another SubRegIndex. - for (SubRegMap::const_iterator i2 = SRM2.begin(), e2 = SRM2.end(); - i2 != e2; ++i2) { - std::pair IdxPair(Idx1, i2->first); - Record *Reg3 = i2->second; - // OK Reg1:IdxPair == Reg3. Find the index with Reg:Idx == Reg3. - for (SubRegMap::const_iterator i1d = SRM1.begin(), e1d = SRM1.end(); - i1d != e1d; ++i1d) { - // Ignore identity compositions. - if (Reg2 == Reg3) - continue; - if (i1d->second == Reg3) { - std::pair Ins = - Composite.insert(std::make_pair(IdxPair, i1d->first)); - // Conflicting composition? Emit a warning but allow it. - if (!Ins.second && Ins.first->second != i1d->first) { - errs() << "Warning: SubRegIndex " << getQualifiedName(Idx1) - << " and " << getQualifiedName(IdxPair.second) - << " compose ambiguously as " - << getQualifiedName(Ins.first->second) << " or " - << getQualifiedName(i1d->first) << "\n"; - } - } - } - } - } - } - - // We don't care about the difference between (Idx1, Idx2) -> Idx2 and invalid - // compositions, so remove any mappings of that form. - for (CompositeMap::iterator i = Composite.begin(), e = Composite.end(); - i != e;) { - CompositeMap::iterator j = i; - ++i; - if (j->first.second == j->second) - Composite.erase(j); - } -} - class RegisterSorter { private: std::map, LessRecord> &RegisterSubRegs; @@ -340,6 +187,7 @@ public: void RegisterInfoEmitter::run(raw_ostream &OS) { CodeGenTarget Target(Records); CodeGenRegBank &RegBank = Target.getRegBank(); + RegBank.computeDerivedInfo(); EmitSourceFileHeader("Register Information Source Fragment", OS); OS << "namespace llvm {\n\n"; @@ -866,9 +714,6 @@ void RegisterInfoEmitter::run(raw_ostream &OS) { // Calculate the mapping of subregister+index pairs to physical registers. // This will also create further anonymous indexes. unsigned NamedIndices = RegBank.getNumNamedIndices(); - RegisterMaps RegMaps; - for (unsigned i = 0, e = Regs.size(); i != e; ++i) - RegMaps.inferSubRegIndices(Regs[i].TheDef, Target); // Emit SubRegIndex names, skipping 0 const std::vector &SubRegIndices = RegBank.getSubRegIndices(); @@ -901,16 +746,16 @@ void RegisterInfoEmitter::run(raw_ostream &OS) { << " switch (RegNo) {\n" << " default:\n return 0;\n"; for (unsigned i = 0, e = Regs.size(); i != e; ++i) { - RegisterMaps::SubRegMap &SRM = RegMaps.SubReg[Regs[i].TheDef]; + const CodeGenRegister::SubRegMap &SRM = Regs[i].getSubRegs(); if (SRM.empty()) continue; OS << " case " << getQualifiedName(Regs[i].TheDef) << ":\n"; OS << " switch (Index) {\n"; OS << " default: return 0;\n"; - for (RegisterMaps::SubRegMap::const_iterator ii = SRM.begin(), + for (CodeGenRegister::SubRegMap::const_iterator ii = SRM.begin(), ie = SRM.end(); ii != ie; ++ii) OS << " case " << getQualifiedName(ii->first) - << ": return " << getQualifiedName(ii->second) << ";\n"; + << ": return " << getQualifiedName(ii->second->TheDef) << ";\n"; OS << " };\n" << " break;\n"; } OS << " };\n"; @@ -922,13 +767,13 @@ void RegisterInfoEmitter::run(raw_ostream &OS) { << " switch (RegNo) {\n" << " default:\n return 0;\n"; for (unsigned i = 0, e = Regs.size(); i != e; ++i) { - RegisterMaps::SubRegMap &SRM = RegMaps.SubReg[Regs[i].TheDef]; + const CodeGenRegister::SubRegMap &SRM = Regs[i].getSubRegs(); if (SRM.empty()) continue; OS << " case " << getQualifiedName(Regs[i].TheDef) << ":\n"; - for (RegisterMaps::SubRegMap::const_iterator ii = SRM.begin(), + for (CodeGenRegister::SubRegMap::const_iterator ii = SRM.begin(), ie = SRM.end(); ii != ie; ++ii) - OS << " if (SubRegNo == " << getQualifiedName(ii->second) + OS << " if (SubRegNo == " << getQualifiedName(ii->second->TheDef) << ") return " << getQualifiedName(ii->first) << ";\n"; OS << " return 0;\n"; } @@ -937,7 +782,6 @@ void RegisterInfoEmitter::run(raw_ostream &OS) { OS << "}\n\n"; // Emit composeSubRegIndices - RegMaps.computeComposites(); OS << "unsigned " << ClassName << "::composeSubRegIndices(unsigned IdxA, unsigned IdxB) const {\n" << " switch (IdxA) {\n" @@ -945,8 +789,8 @@ void RegisterInfoEmitter::run(raw_ostream &OS) { for (unsigned i = 0, e = SubRegIndices.size(); i != e; ++i) { bool Open = false; for (unsigned j = 0; j != e; ++j) { - if (Record *Comp = RegMaps.Composite.lookup( - std::make_pair(SubRegIndices[i], SubRegIndices[j]))) { + if (Record *Comp = RegBank.getCompositeSubRegIndex(SubRegIndices[i], + SubRegIndices[j])) { if (!Open) { OS << " case " << getQualifiedName(SubRegIndices[i]) << ": switch(IdxB) {\n default: return IdxB;\n";