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Teach ComputeMaskedBits about nsw on add. I don't think there's anything we can

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do with nuw here, but sub and mul should be given similar treatment.
Fixes PR9343 #15!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127463 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nick Lewycky 2011-03-11 09:00:19 +00:00
parent 6fd2472b1b
commit b69050a94c
2 changed files with 24 additions and 0 deletions
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14
lib/Analysis/ValueTracking.cpp
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@ -429,6 +429,20 @@ void llvm::ComputeMaskedBits(Value *V, const APInt &Mask,
KnownZero |= LHSKnownZero & Mask;
KnownOne |= LHSKnownOne & Mask;
}
// Are we still trying to solve for the sign bit?
if (Mask.isNegative() && !KnownZero.isNegative() && !KnownOne.isNegative()){
OverflowingBinaryOperator *OBO = cast<OverflowingBinaryOperator>(I);
if (OBO->hasNoSignedWrap()) {
// Adding two positive numbers can't wrap into negative ...
if (LHSKnownZero.isNegative() && KnownZero2.isNegative())
KnownZero |= APInt::getSignBit(BitWidth);
// and adding two negative numbers can't wrap into positive.
else if (LHSKnownOne.isNegative() && KnownOne2.isNegative())
KnownOne |= APInt::getSignBit(BitWidth);
}
}
return;
}
case Instruction::SRem:

10
test/Transforms/InstSimplify/compare.ll
View File

@ -261,6 +261,16 @@ define i1 @srem1(i32 %X) {
; CHECK: ret i1 false
}
; PR9343 #15
; CHECK: @srem2
; CHECK: ret i1 false
define i1 @srem2(i16 %X, i32 %Y) {
%A = zext i16 %X to i32
%B = add nsw i32 %A, 1
%C = srem i32 %B, %Y
%D = icmp slt i32 %C, 0
ret i1 %D
}
define i1 @udiv1(i32 %X) {
; CHECK: @udiv1
%A = udiv i32 %X, 1000000