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Merging r223328:

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r223328 | hfinkel | 2014-12-04 00:46:20 +0000 (Thu, 04 Dec 2014) | 8 lines

[PowerPC] 'cc' should be an alias only to 'cr0'

We had mistakenly believed that GCC's 'cc' referred to the entire
condition-code register (cr0 through cr7) -- and implemented this in r205630 to
fix PR19326, but 'cc' is actually an alias only to 'cr0'. This is causing LLVM
to clobber too much with legacy code with inline asm using the 'cc' clobber.

Fixes PR21451.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223747 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Hal Finkel 2014-12-09 02:37:11 +00:00
parent b45b9d6766
commit b6c3a6cbdf
2 changed files with 3 additions and 5 deletions
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6
lib/Target/PowerPC/PPCRegisterInfo.td
View File

@ -188,11 +188,9 @@ def CR6 : CR<6, "cr6", [CR6LT, CR6GT, CR6EQ, CR6UN]>, DwarfRegNum<[74, 74]>;
def CR7 : CR<7, "cr7", [CR7LT, CR7GT, CR7EQ, CR7UN]>, DwarfRegNum<[75, 75]>;
}
// The full condition-code register. This is not modeled fully, but defined
// here primarily, for compatibility with gcc, to allow the inline asm "cc"
// clobber specification to work.
// An alias for "cr0" used by GCC.
def CC : PPCReg<"cc">, DwarfRegAlias<CR0> {
let Aliases = [CR0, CR1, CR2, CR3, CR4, CR5, CR6, CR7];
let Aliases = [CR0];
}
// Link register

2
test/CodeGen/PowerPC/cc.ll
View File

@ -41,7 +41,7 @@ entry:
br label %foo
foo:
call { i64, i64 } asm sideeffect "sc", "={r0},={r3},{r0},~{cc}" (i64 %a)
call { i64, i64 } asm sideeffect "sc", "={r0},={r3},{r0},~{cc},~{cr1},~{cr2},~{cr3},~{cr4},~{cr5},~{cr6},~{cr7}" (i64 %a)
br i1 %c, label %bar, label %end
bar: