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[PowerPC] Make use of VSX f64 <-> i64 conversion instructions

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When VSX is available, these instructions should be used in preference to the
older variants that only have access to the scalar floating-point registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204559 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Hal Finkel
2014-03-23 05:35:00 +00:00
parent fb51aac129
commit b6cbecd272
4 changed files with 111 additions and 6 deletions
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49
test/CodeGen/PowerPC/float-to-int.ll
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@@ -1,4 +1,5 @@
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 | FileCheck %s
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx | FileCheck -check-prefix=CHECK-VSX %s
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
@@ -12,6 +13,12 @@ define i64 @foo(float %a) nounwind {
; CHECK: stfd [[REG]],
; CHECK: ld 3,
; CHECK: blr
; CHECK-VSX: @foo
; CHECK-VSX: xscvdpsxds [[REG:[0-9]+]], 1
; CHECK-VSX: stxsdx [[REG]],
; CHECK-VSX: ld 3,
; CHECK-VSX: blr
}
define i64 @foo2(double %a) nounwind {
@@ -23,6 +30,12 @@ define i64 @foo2(double %a) nounwind {
; CHECK: stfd [[REG]],
; CHECK: ld 3,
; CHECK: blr
; CHECK-VSX: @foo2
; CHECK-VSX: xscvdpsxds [[REG:[0-9]+]], 1
; CHECK-VSX: stxsdx [[REG]],
; CHECK-VSX: ld 3,
; CHECK-VSX: blr
}
define i64 @foo3(float %a) nounwind {
@@ -34,6 +47,12 @@ define i64 @foo3(float %a) nounwind {
; CHECK: stfd [[REG]],
; CHECK: ld 3,
; CHECK: blr
; CHECK-VSX: @foo3
; CHECK-VSX: xscvdpuxds [[REG:[0-9]+]], 1
; CHECK-VSX: stxsdx [[REG]],
; CHECK-VSX: ld 3,
; CHECK-VSX: blr
}
define i64 @foo4(double %a) nounwind {
@@ -45,6 +64,12 @@ define i64 @foo4(double %a) nounwind {
; CHECK: stfd [[REG]],
; CHECK: ld 3,
; CHECK: blr
; CHECK-VSX: @foo4
; CHECK-VSX: xscvdpuxds [[REG:[0-9]+]], 1
; CHECK-VSX: stxsdx [[REG]],
; CHECK-VSX: ld 3,
; CHECK-VSX: blr
}
define i32 @goo(float %a) nounwind {
@@ -56,6 +81,12 @@ define i32 @goo(float %a) nounwind {
; CHECK: stfiwx [[REG]],
; CHECK: lwz 3,
; CHECK: blr
; CHECK-VSX: @goo
; CHECK-VSX: xscvdpsxws [[REG:[0-9]+]], 1
; CHECK-VSX: stfiwx [[REG]],
; CHECK-VSX: lwz 3,
; CHECK-VSX: blr
}
define i32 @goo2(double %a) nounwind {
@@ -67,6 +98,12 @@ define i32 @goo2(double %a) nounwind {
; CHECK: stfiwx [[REG]],
; CHECK: lwz 3,
; CHECK: blr
; CHECK-VSX: @goo2
; CHECK-VSX: xscvdpsxws [[REG:[0-9]+]], 1
; CHECK-VSX: stfiwx [[REG]],
; CHECK-VSX: lwz 3,
; CHECK-VSX: blr
}
define i32 @goo3(float %a) nounwind {
@@ -78,6 +115,12 @@ define i32 @goo3(float %a) nounwind {
; CHECK: stfiwx [[REG]],
; CHECK: lwz 3,
; CHECK: blr
; CHECK-VSX: @goo3
; CHECK-VSX: xscvdpuxws [[REG:[0-9]+]], 1
; CHECK-VSX: stfiwx [[REG]],
; CHECK-VSX: lwz 3,
; CHECK-VSX: blr
}
define i32 @goo4(double %a) nounwind {
@@ -89,5 +132,11 @@ define i32 @goo4(double %a) nounwind {
; CHECK: stfiwx [[REG]],
; CHECK: lwz 3,
; CHECK: blr
; CHECK-VSX: @goo4
; CHECK-VSX: xscvdpuxws [[REG:[0-9]+]], 1
; CHECK-VSX: stfiwx [[REG]],
; CHECK-VSX: lwz 3,
; CHECK-VSX: blr
}