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[ms-inline asm] Have the [ Symbol ] case fall into the more general logic. This
is a follow on to r179393. Test case to be added on the clang side. Part of rdar://13453209 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179399 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1135,38 +1135,9 @@ X86Operand *X86AsmParser::ParseIntelBracExpression(unsigned SegReg,
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unsigned TmpReg = 0;
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unsigned TmpReg = 0;
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SMLoc StartInBrac = Tok.getLoc();
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SMLoc StartInBrac = Tok.getLoc();
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// Parse [ Symbol + ImmDisp ] and [ BaseReg + Scale*IndexReg + ImmDisp ]. We
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// Try to handle '[' 'Symbol' ']'
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// may have already parsed an immediate displacement before the bracketed
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if (getLexer().is(AsmToken::Identifier)) {
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// expression.
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SMLoc Loc = Tok.getLoc();
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if (ParseRegister(TmpReg, Loc, End)) {
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const MCExpr *Disp;
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StringRef Identifier = Tok.getString();
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if (getParser().parseExpression(Disp, End))
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return 0;
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if (X86Operand *Err = ParseIntelVarWithQualifier(Disp, Identifier))
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return Err;
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if (getLexer().isNot(AsmToken::RBrac))
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return ErrorOperand(Tok.getLoc(), "Expected ']' token!");
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if (isParsingInlineAsm()) {
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// Remove the '[' and ']' from the IR string.
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InstInfo->AsmRewrites->push_back(AsmRewrite(AOK_Skip, Start, 1));
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InstInfo->AsmRewrites->push_back(AsmRewrite(AOK_Skip, Tok.getLoc(), 1));
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}
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Parser.Lex(); // Eat ']'
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if (!isParsingInlineAsm())
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return X86Operand::CreateMem(Disp, Start, End, Size);
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return CreateMemForInlineAsm(/*SegReg=*/0, Disp, /*BaseReg=*/0,
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/*IndexReg=*/0, /*Scale*/1, Start, End,
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SizeDirLoc, Size, Identifier);
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}
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}
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// Parse [ BaseReg + Scale*IndexReg + Disp ]. We may have already parsed an
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// immediate displacement before the bracketed expression.
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bool Done = false;
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bool Done = false;
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IntelBracExprStateMachine SM(Parser, ImmDisp);
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IntelBracExprStateMachine SM(Parser, ImmDisp);
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@ -1196,14 +1167,17 @@ X86Operand *X86AsmParser::ParseIntelBracExpression(unsigned SegReg,
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// This could be a register or a symbolic displacement.
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// This could be a register or a symbolic displacement.
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unsigned TmpReg;
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unsigned TmpReg;
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const MCExpr *Disp = 0;
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const MCExpr *Disp = 0;
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AsmToken IdentTok = Parser.getTok();
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SMLoc IdentLoc = Tok.getLoc();
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SMLoc IdentLoc = IdentTok.getLoc();
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StringRef Identifier = Tok.getString();
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if(!ParseRegister(TmpReg, IdentLoc, End)) {
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if(!ParseRegister(TmpReg, IdentLoc, End)) {
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SM.onRegister(TmpReg);
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SM.onRegister(TmpReg);
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UpdateLocLex = false;
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UpdateLocLex = false;
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break;
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break;
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} else if (!getParser().parsePrimaryExpr(Disp, End)) {
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} else if (!getParser().parsePrimaryExpr(Disp, End)) {
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SM.onDispExpr(Disp, IdentTok.getString());
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if (X86Operand *Err = ParseIntelVarWithQualifier(Disp, Identifier))
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return Err;
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SM.onDispExpr(Disp, Identifier);
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UpdateLocLex = false;
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UpdateLocLex = false;
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break;
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break;
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}
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}
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@ -1240,19 +1214,23 @@ X86Operand *X86AsmParser::ParseIntelBracExpression(unsigned SegReg,
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InstInfo->AsmRewrites->push_back(AsmRewrite(AOK_Skip, End, 1));
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InstInfo->AsmRewrites->push_back(AsmRewrite(AOK_Skip, End, 1));
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// If ImmDisp is non-zero, then we parsed a displacement before the
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// If ImmDisp is non-zero, then we parsed a displacement before the
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// bracketed expression (i.e., ImmDisp [ BaseReg + Scale*IndexReg + Disp ])
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// bracketed expression (i.e., ImmDisp [ BaseReg + Scale*IndexReg + Disp])
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uint64_t FinalImmDisp = SM.getImmDisp();
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uint64_t FinalImmDisp = SM.getImmDisp();
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if (ImmDisp && ImmDisp != FinalImmDisp) {
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// If ImmDisp doesn't match the displacement computed by the state machine
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// If ImmDisp doesn't match the displacement computed by the state machine
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// then we have an additional displacement in the bracketed expression.
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// then we have an additional displacement in the bracketed expression.
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if (ImmDisp != FinalImmDisp) {
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if (ImmDisp) {
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// FIXME: We have an immediate displacement before the bracketed
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// expression. Adjust this to match the final immediate displacement.
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} else {
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// We have a symbolic and an immediate displacement, but no displacement
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// before the bracketed expression.
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} else if (FinalImmDisp) {
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// Put the immediate displacement before the bracketed expression.
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// We have a symbolic and an immediate displacement, but no displacement
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InstInfo->AsmRewrites->push_back(AsmRewrite(AOK_Imm, Start, 0,
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// before the bracketed expression.
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FinalImmDisp));
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}
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// Put the immediate displacement before the bracketed expression.
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InstInfo->AsmRewrites->push_back(AsmRewrite(AOK_Imm, Start, 0,
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FinalImmDisp));
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}
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}
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// Remove all the ImmPrefix rewrites within the brackets.
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// Remove all the ImmPrefix rewrites within the brackets.
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for (SmallVectorImpl<AsmRewrite>::iterator
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for (SmallVectorImpl<AsmRewrite>::iterator
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