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Implement Transforms/InstCombine/shift-sra.ll:test0

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30450 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-09-18 04:31:40 +00:00
parent 2f88a1bbbe
commit b7363791ed
1 changed files with 20 additions and 0 deletions
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20
lib/Transforms/Scalar/InstructionCombining.cpp
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@ -1089,6 +1089,26 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, uint64_t DemandedMask,
}
break;
case Instruction::Shr:
// If this is an arithmetic shift right and only the low-bit is set, we can
// always convert this into a logical shr, even if the shift amount is
// variable. The low bit of the shift cannot be an input sign bit unless
// the shift amount is >= the size of the datatype, which is undefined.
if (DemandedMask == 1 && I->getType()->isSigned()) {
// Convert the input to unsigned.
Instruction *NewVal = new CastInst(I->getOperand(0),
I->getType()->getUnsignedVersion(),
I->getOperand(0)->getName());
InsertNewInstBefore(NewVal, *I);
// Perform the unsigned shift right.
NewVal = new ShiftInst(Instruction::Shr, NewVal, I->getOperand(1),
I->getName());
InsertNewInstBefore(NewVal, *I);
// Then cast that to the destination type.
NewVal = new CastInst(NewVal, I->getType(), I->getName());
InsertNewInstBefore(NewVal, *I);
return UpdateValueUsesWith(I, NewVal);
}
if (ConstantUInt *SA = dyn_cast<ConstantUInt>(I->getOperand(1))) {
unsigned ShAmt = SA->getValue();