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Add some tests and update an existing test to reflect recent
x86 isel peeps. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92509 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1,22 +1,35 @@
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; RUN: llc < %s -march=x86 -mcpu=yonah | grep {testl.*%e.x.*%e.x}
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; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck %s
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; rdar://5752025
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; We don't want to fold the and into the test, because the and clobbers its
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; input forcing a copy. We want:
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; movl $15, %ecx
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; andl 4(%esp), %ecx
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; testl %ecx, %ecx
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; We want:
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; CHECK: movl 4(%esp), %ecx
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; CHECK-NEXT: andl $15, %ecx
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: cmovel %ecx, %eax
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; CHECK-NEXT: ret
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;
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; We don't want:
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; movl 4(%esp), %eax
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; movl %eax, %ecx # bad: extra copy
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; andl $15, %ecx
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; testl $15, %eax # bad: peep obstructed
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; movl $42, %eax
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; cmove %ecx, %eax
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; cmovel %ecx, %eax
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; ret
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;
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; Not:
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; movl 4(%esp), %eax
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; movl %eax, %ecx
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; andl $15, %ecx
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; testl $15, %eax
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; We also don't want:
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; movl $15, %ecx # bad: larger encoding
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; andl 4(%esp), %ecx
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; movl $42, %eax
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; cmove %ecx, %eax
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; cmovel %ecx, %eax
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; ret
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;
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; We also don't want:
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; movl 4(%esp), %ecx
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; andl $15, %ecx
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; testl %ecx, %ecx # bad: unnecessary test
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; movl $42, %eax
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; cmovel %ecx, %eax
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; ret
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define i32 @t1(i32 %X) nounwind {
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24
test/CodeGen/X86/twoaddr-lea.ll
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24
test/CodeGen/X86/twoaddr-lea.ll
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@ -0,0 +1,24 @@
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;; X's live range extends beyond the shift, so the register allocator
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;; cannot coalesce it with Y. Because of this, a copy needs to be
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;; emitted before the shift to save the register value before it is
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;; clobbered. However, this copy is not needed if the register
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;; allocator turns the shift into an LEA. This also occurs for ADD.
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; Check that the shift gets turned into an LEA.
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; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
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; RUN: not grep {mov E.X, E.X}
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@G = external global i32 ; <i32*> [#uses=3]
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define i32 @test1(i32 %X, i32 %Y) {
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%Z = add i32 %X, %Y ; <i32> [#uses=1]
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volatile store i32 %Y, i32* @G
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volatile store i32 %Z, i32* @G
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ret i32 %X
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}
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define i32 @test2(i32 %X) {
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%Z = add i32 %X, 1 ; <i32> [#uses=1]
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volatile store i32 %Z, i32* @G
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ret i32 %X
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}
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56
test/CodeGen/X86/use-add-flags.ll
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56
test/CodeGen/X86/use-add-flags.ll
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; RUN: llc < %s -march=x86-64 -o - | FileCheck %s
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; Reuse the flags value from the add instructions instead of emitting separate
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; testl instructions.
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; Use the flags on the add.
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; CHECK: add_zf:
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; CHECK: addl (%rdi), %esi
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; CHECK-NEXT: movl %edx, %eax
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; CHECK-NEXT: cmovnsl %ecx, %eax
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; CHECK-NEXT: ret
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define i32 @add_zf(i32* %x, i32 %y, i32 %a, i32 %b) nounwind {
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%tmp2 = load i32* %x, align 4 ; <i32> [#uses=1]
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%tmp4 = add i32 %tmp2, %y ; <i32> [#uses=1]
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%tmp5 = icmp slt i32 %tmp4, 0 ; <i1> [#uses=1]
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%tmp.0 = select i1 %tmp5, i32 %a, i32 %b ; <i32> [#uses=1]
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ret i32 %tmp.0
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}
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declare void @foo(i32)
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; Don't use the flags result of the and here, since the and has no
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; other use. A simple test is better.
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; CHECK: bar:
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; CHECK: testb $16, %dil
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define void @bar(i32 %x) nounwind {
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%y = and i32 %x, 16
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%t = icmp eq i32 %y, 0
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br i1 %t, label %true, label %false
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true:
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call void @foo(i32 %x)
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ret void
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false:
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ret void
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}
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; Do use the flags result of the and here, since the and has another use.
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; CHECK: qux:
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; CHECK: andl $16, %edi
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; CHECK-NEXT: jne .LBB3_2
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define void @qux(i32 %x) nounwind {
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%y = and i32 %x, 16
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%t = icmp eq i32 %y, 0
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br i1 %t, label %true, label %false
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true:
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call void @foo(i32 %y)
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ret void
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false:
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ret void
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}
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