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reg test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21914 91177308-0d34-0410-b5e6-96231b3b80d8
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test/CodeGen/X86/fast-cc-pass-in-regs.ll
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14
test/CodeGen/X86/fast-cc-pass-in-regs.ll
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; llvm-as < %s | llc -x86-asm-syntax=intel -enable-x86-fastcc | grep 'mov %EDX, 1'
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; check that fastcc is passing stuff in regs.
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declare fastcc long %callee(long)
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long %caller() {
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%X = call fastcc long %callee(long 4294967299) ;; (1ULL << 32) + 3
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ret long %X
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}
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fastcc long %caller2(long %X) {
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ret long %X
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}
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