From b7994fedcbcf375ee70b0ad11e1c962c0ccfc1ae Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Sat, 8 Oct 2011 20:20:03 +0000 Subject: [PATCH] Prevent potential NOREX bug. A GR8_NOREX virtual register is created when extrating a sub_8bit_hi sub-register: %vreg2 = COPY %vreg1:sub_8bit_hi; GR8_NOREX:%vreg2 %GR64_ABCD:%vreg1 TEST8ri_NOREX %vreg2, 1, %EFLAGS; GR8_NOREX:%vreg2 If such a live range is ever split, its register class must not be inflated to GR8. The sub-register copy can only target GR8_NOREX. I dont have a test case for this theoretical bug. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141500 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86RegisterInfo.cpp | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp index 23242e3edf0..c1ac9f34311 100644 --- a/lib/Target/X86/X86RegisterInfo.cpp +++ b/lib/Target/X86/X86RegisterInfo.cpp @@ -246,6 +246,17 @@ X86RegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A, const TargetRegisterClass* X86RegisterInfo::getLargestLegalSuperClass(const TargetRegisterClass *RC) const{ + // Don't allow super-classes of GR8_NOREX. This class is only used after + // extrating sub_8bit_hi sub-registers. The H sub-registers cannot be copied + // to the full GR8 register class in 64-bit mode, so we cannot allow the + // reigster class inflation. + // + // The GR8_NOREX class is always used in a way that won't be constrained to a + // sub-class, so sub-classes like GR8_ABCD_L are allowed to expand to the + // full GR8 class. + if (RC == X86::GR8_NOREXRegisterClass) + return RC; + const TargetRegisterClass *Super = RC; TargetRegisterClass::sc_iterator I = RC->getSuperClasses(); do {