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Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100259 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -478,7 +478,7 @@ static inline ARM_AM::AMSubMode getAMSubModeForBits(unsigned bits) {
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/// followed by possible src(s).
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/// followed by possible src(s).
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///
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///
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/// The processing of the predicate, and the 'S' modifier bit, if MI modifies
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/// The processing of the predicate, and the 'S' modifier bit, if MI modifies
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/// the CPSR, is factored into ARMBasicMCBuilder's class method named
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/// the CPSR, is factored into ARMBasicMCBuilder's method named
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/// TryPredicateAndSBitModifier.
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/// TryPredicateAndSBitModifier.
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static bool DisassemblePseudo(MCInst &MI, unsigned Opcode, uint32_t insn,
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static bool DisassemblePseudo(MCInst &MI, unsigned Opcode, uint32_t insn,
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@ -3159,7 +3159,7 @@ ARMAlgorithm *ARMAlgorithm::GetInstance(ARMFormat Format) {
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/// The general idea is to set the Opcode for the MCInst, followed by adding
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/// The general idea is to set the Opcode for the MCInst, followed by adding
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/// the appropriate MCOperands to the MCInst. ARM Basic MC Builder delegates
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/// the appropriate MCOperands to the MCInst. ARM Basic MC Builder delegates
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/// to the Algo (ARM Disassemble Algorithm) object to perform Format-specific
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/// to the Algo (ARM Disassemble Algorithm) object to perform Format-specific
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/// disassembly, followed by class method TryPredicateAndSBitModifier() to do
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/// disassembly, followed by TryPredicateAndSBitModifier() to do
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/// PredicateOperand and OptionalDefOperand which follow the Dst/Src Operands.
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/// PredicateOperand and OptionalDefOperand which follow the Dst/Src Operands.
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bool ARMBasicMCBuilder::BuildIt(MCInst &MI, uint32_t insn) {
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bool ARMBasicMCBuilder::BuildIt(MCInst &MI, uint32_t insn) {
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// Stage 1 sets the Opcode.
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// Stage 1 sets the Opcode.
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