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Give priority to AVX over SSE for 128-bit floating point unpck instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148233 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2529,40 +2529,7 @@ let AddedComplexity = 10 in {
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} // Constraints = "$src1 = $dst"
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} // AddedComplexity
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let Predicates = [HasSSE1] in {
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def : Pat<(v4f32 (X86Unpckl VR128:$src1, (memopv4f32 addr:$src2))),
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(UNPCKLPSrm VR128:$src1, addr:$src2)>;
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def : Pat<(v4f32 (X86Unpckl VR128:$src1, VR128:$src2)),
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(UNPCKLPSrr VR128:$src1, VR128:$src2)>;
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def : Pat<(v4f32 (X86Unpckh VR128:$src1, (memopv4f32 addr:$src2))),
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(UNPCKHPSrm VR128:$src1, addr:$src2)>;
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def : Pat<(v4f32 (X86Unpckh VR128:$src1, VR128:$src2)),
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(UNPCKHPSrr VR128:$src1, VR128:$src2)>;
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}
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let Predicates = [HasSSE2] in {
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def : Pat<(v2f64 (X86Unpckl VR128:$src1, (memopv2f64 addr:$src2))),
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(UNPCKLPDrm VR128:$src1, addr:$src2)>;
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def : Pat<(v2f64 (X86Unpckl VR128:$src1, VR128:$src2)),
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(UNPCKLPDrr VR128:$src1, VR128:$src2)>;
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def : Pat<(v2f64 (X86Unpckh VR128:$src1, (memopv2f64 addr:$src2))),
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(UNPCKHPDrm VR128:$src1, addr:$src2)>;
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def : Pat<(v2f64 (X86Unpckh VR128:$src1, VR128:$src2)),
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(UNPCKHPDrr VR128:$src1, VR128:$src2)>;
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// FIXME: Instead of X86Movddup, there should be a X86Unpckl here, the
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// problem is during lowering, where it's not possible to recognize the load
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// fold cause it has two uses through a bitcast. One use disappears at isel
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// time and the fold opportunity reappears.
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def : Pat<(v2f64 (X86Movddup VR128:$src)),
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(UNPCKLPDrr VR128:$src, VR128:$src)>;
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let AddedComplexity = 10 in
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def : Pat<(splat_lo (v2f64 VR128:$src), (undef)),
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(UNPCKLPDrr VR128:$src, VR128:$src)>;
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}
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let Predicates = [HasAVX] in {
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let Predicates = [HasAVX], AddedComplexity = 1 in {
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def : Pat<(v4f32 (X86Unpckl VR128:$src1, (memopv4f32 addr:$src2))),
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(VUNPCKLPSrm VR128:$src1, addr:$src2)>;
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def : Pat<(v4f32 (X86Unpckl VR128:$src1, VR128:$src2)),
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@ -2610,6 +2577,39 @@ let Predicates = [HasAVX] in {
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(VUNPCKLPDrr VR128:$src, VR128:$src)>;
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}
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let Predicates = [HasSSE1] in {
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def : Pat<(v4f32 (X86Unpckl VR128:$src1, (memopv4f32 addr:$src2))),
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(UNPCKLPSrm VR128:$src1, addr:$src2)>;
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def : Pat<(v4f32 (X86Unpckl VR128:$src1, VR128:$src2)),
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(UNPCKLPSrr VR128:$src1, VR128:$src2)>;
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def : Pat<(v4f32 (X86Unpckh VR128:$src1, (memopv4f32 addr:$src2))),
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(UNPCKHPSrm VR128:$src1, addr:$src2)>;
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def : Pat<(v4f32 (X86Unpckh VR128:$src1, VR128:$src2)),
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(UNPCKHPSrr VR128:$src1, VR128:$src2)>;
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}
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let Predicates = [HasSSE2] in {
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def : Pat<(v2f64 (X86Unpckl VR128:$src1, (memopv2f64 addr:$src2))),
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(UNPCKLPDrm VR128:$src1, addr:$src2)>;
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def : Pat<(v2f64 (X86Unpckl VR128:$src1, VR128:$src2)),
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(UNPCKLPDrr VR128:$src1, VR128:$src2)>;
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def : Pat<(v2f64 (X86Unpckh VR128:$src1, (memopv2f64 addr:$src2))),
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(UNPCKHPDrm VR128:$src1, addr:$src2)>;
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def : Pat<(v2f64 (X86Unpckh VR128:$src1, VR128:$src2)),
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(UNPCKHPDrr VR128:$src1, VR128:$src2)>;
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// FIXME: Instead of X86Movddup, there should be a X86Unpckl here, the
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// problem is during lowering, where it's not possible to recognize the load
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// fold cause it has two uses through a bitcast. One use disappears at isel
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// time and the fold opportunity reappears.
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def : Pat<(v2f64 (X86Movddup VR128:$src)),
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(UNPCKLPDrr VR128:$src, VR128:$src)>;
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let AddedComplexity = 10 in
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def : Pat<(splat_lo (v2f64 VR128:$src), (undef)),
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(UNPCKLPDrr VR128:$src, VR128:$src)>;
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}
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//===----------------------------------------------------------------------===//
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// SSE 1 & 2 - Extract Floating-Point Sign mask
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//===----------------------------------------------------------------------===//
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