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Remove some unused variables and methods warned about by

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icc (#177, partial).  Patch by Erick Tryzelaar.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81106 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Duncan Sands 2009-09-06 08:33:48 +00:00
parent 34d0194583
commit b7c5bdf843
9 changed files with 2 additions and 15 deletions
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3
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -4481,7 +4481,6 @@ SDValue DAGCombiner::visitBRCOND(SDNode *N) {
if (Op0.getOpcode() == ISD::AND &&
Op0.hasOneUse() &&
Op1.getOpcode() == ISD::Constant) {
SDValue AndOp0 = Op0.getOperand(0);
SDValue AndOp1 = Op0.getOperand(1);
if (AndOp1.getOpcode() == ISD::Constant) {
@ -5405,7 +5404,6 @@ SDValue DAGCombiner::visitEXTRACT_VECTOR_ELT(SDNode *N) {
SDValue DAGCombiner::visitBUILD_VECTOR(SDNode *N) {
unsigned NumInScalars = N->getNumOperands();
EVT VT = N->getValueType(0);
EVT EltType = VT.getVectorElementType();
// Check to see if this is a BUILD_VECTOR of a bunch of EXTRACT_VECTOR_ELT
// operations. If so, and if the EXTRACT_VECTOR_ELT vector inputs come from
@ -5506,7 +5504,6 @@ SDValue DAGCombiner::visitVECTOR_SHUFFLE(SDNode *N) {
unsigned NumElts = VT.getVectorNumElements();
SDValue N0 = N->getOperand(0);
SDValue N1 = N->getOperand(1);
assert(N0.getValueType().getVectorNumElements() == NumElts &&
"Vector shuffle must be normalized in DAG");

3
lib/CodeGen/VirtRegRewriter.cpp
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@ -1128,8 +1128,7 @@ private:
return false;
// Back-schedule reloads and remats.
MachineBasicBlock::iterator InsertLoc =
ComputeReloadLoc(MII, MBB.begin(), PhysReg, TRI, false, SS, TII, MF);
ComputeReloadLoc(MII, MBB.begin(), PhysReg, TRI, false, SS, TII, MF);
// Load from SS to the spare physical register.
TII->loadRegFromStackSlot(MBB, MII, PhysReg, SS, RC);

2
lib/Support/APInt.cpp
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@ -1481,9 +1481,7 @@ APInt::ms APInt::magic() const {
const APInt& d = *this;
unsigned p;
APInt ad, anc, delta, q1, r1, q2, r2, t;
APInt allOnes = APInt::getAllOnesValue(d.getBitWidth());
APInt signedMin = APInt::getSignedMinValue(d.getBitWidth());
APInt signedMax = APInt::getSignedMaxValue(d.getBitWidth());
struct ms mag;
ad = d.abs();

3
lib/Target/ARM/Thumb1RegisterInfo.cpp
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@ -737,8 +737,7 @@ void Thumb1RegisterInfo::emitPrologue(MachineFunction &MF) const {
// Darwin ABI requires FP to point to the stack slot that contains the
// previous FP.
if (STI.isTargetDarwin() || hasFP(MF)) {
MachineInstrBuilder MIB =
BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr)
BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr)
.addFrameIndex(FramePtrSpillFI).addImm(0);
}

1
lib/Target/MSIL/MSILWriter.cpp
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@ -1678,7 +1678,6 @@ void MSILWriter::printExternals() {
E = ModulePtr->global_end(); I!=E; ++I) {
if (!I->isDeclaration() || !I->hasDLLImportLinkage()) continue;
// Use "LoadLibrary"/"GetProcAddress" to recive variable address.
std::string Label = "not_null$_"+utostr(getUniqID());
std::string Tmp = getTypeName(I->getType())+getValueName(&*I);
printSimpleInstruction("ldsflda",Tmp.c_str());
Out << "\tldstr\t\"" << getLibraryName(&*I) << "\"\n";

1
lib/Target/MSP430/MSP430RegisterInfo.cpp
View File

@ -311,7 +311,6 @@ void MSP430RegisterInfo::emitEpilogue(MachineFunction &MF,
NumBytes = StackSize - CSSize;
// Skip the callee-saved pop instructions.
MachineBasicBlock::iterator LastCSPop = MBBI;
while (MBBI != MBB.begin()) {
MachineBasicBlock::iterator PI = prior(MBBI);
unsigned Opc = PI->getOpcode();

1
lib/Target/SystemZ/SystemZRegisterInfo.cpp
View File

@ -259,7 +259,6 @@ void SystemZRegisterInfo::emitEpilogue(MachineFunction &MF,
SystemZMachineFunctionInfo *SystemZMFI =
MF.getInfo<SystemZMachineFunctionInfo>();
unsigned RetOpcode = MBBI->getOpcode();
DebugLoc DL = MBBI->getDebugLoc();
switch (RetOpcode) {
case SystemZ::RET: break; // These are ok

2
lib/VMCore/AsmWriter.cpp
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@ -1282,8 +1282,6 @@ public:
void writeOperand(const Value *Op, bool PrintType);
void writeParamOperand(const Value *Operand, Attributes Attrs);
const Module* getModule() { return TheModule; }
private:
void printModule(const Module *M);
void printTypeSymbolTable(const TypeSymbolTable &ST);

1
utils/TableGen/FastISelEmitter.cpp
View File

@ -216,7 +216,6 @@ public:
explicit FastISelMap(std::string InstNS);
void CollectPatterns(CodeGenDAGPatterns &CGP);
void PrintClass(raw_ostream &OS);
void PrintFunctionDefinitions(raw_ostream &OS);
};