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Copy ExpandInlineAsm to TargetLowering from TargetAsmInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76441 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1270,6 +1270,15 @@ public:
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// Inline Asm Support hooks
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//
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/// ExpandInlineAsm - This hook allows the target to expand an inline asm
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/// call to be explicit llvm code if it wants to. This is useful for
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/// turning simple inline asms into LLVM intrinsics, which gives the
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/// compiler more information about the behavior of the code.
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// FIXME: Move this to TargetLowering.
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virtual bool ExpandInlineAsm(CallInst *CI) const {
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return false;
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}
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enum ConstraintType {
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C_Register, // Constraint represents specific register(s).
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C_RegisterClass, // Constraint represents any of register(s) in class.
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@ -22,6 +22,7 @@
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#include "llvm/GlobalAlias.h"
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#include "llvm/GlobalVariable.h"
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#include "llvm/Function.h"
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#include "llvm/Instructions.h"
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#include "llvm/Intrinsics.h"
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#include "llvm/LLVMContext.h"
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#include "llvm/ADT/BitVector.h"
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@ -8658,6 +8659,100 @@ SDValue X86TargetLowering::PerformDAGCombine(SDNode *N,
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// X86 Inline Assembly Support
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//===----------------------------------------------------------------------===//
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static bool LowerToBSwap(CallInst *CI) {
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// FIXME: this should verify that we are targetting a 486 or better. If not,
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// we will turn this bswap into something that will be lowered to logical ops
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// instead of emitting the bswap asm. For now, we don't support 486 or lower
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// so don't worry about this.
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// Verify this is a simple bswap.
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if (CI->getNumOperands() != 2 ||
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CI->getType() != CI->getOperand(1)->getType() ||
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!CI->getType()->isInteger())
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return false;
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const IntegerType *Ty = dyn_cast<IntegerType>(CI->getType());
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if (!Ty || Ty->getBitWidth() % 16 != 0)
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return false;
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// Okay, we can do this xform, do so now.
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const Type *Tys[] = { Ty };
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Module *M = CI->getParent()->getParent()->getParent();
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Constant *Int = Intrinsic::getDeclaration(M, Intrinsic::bswap, Tys, 1);
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Value *Op = CI->getOperand(1);
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Op = CallInst::Create(Int, Op, CI->getName(), CI);
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CI->replaceAllUsesWith(Op);
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CI->eraseFromParent();
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return true;
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}
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bool X86TargetLowering::ExpandInlineAsm(CallInst *CI) const {
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InlineAsm *IA = cast<InlineAsm>(CI->getCalledValue());
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std::vector<InlineAsm::ConstraintInfo> Constraints = IA->ParseConstraints();
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std::string AsmStr = IA->getAsmString();
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// TODO: should remove alternatives from the asmstring: "foo {a|b}" -> "foo a"
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std::vector<std::string> AsmPieces;
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SplitString(AsmStr, AsmPieces, "\n"); // ; as separator?
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switch (AsmPieces.size()) {
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default: return false;
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case 1:
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AsmStr = AsmPieces[0];
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AsmPieces.clear();
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SplitString(AsmStr, AsmPieces, " \t"); // Split with whitespace.
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// bswap $0
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if (AsmPieces.size() == 2 &&
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(AsmPieces[0] == "bswap" ||
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AsmPieces[0] == "bswapq" ||
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AsmPieces[0] == "bswapl") &&
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(AsmPieces[1] == "$0" ||
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AsmPieces[1] == "${0:q}")) {
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// No need to check constraints, nothing other than the equivalent of
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// "=r,0" would be valid here.
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return LowerToBSwap(CI);
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}
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// rorw $$8, ${0:w} --> llvm.bswap.i16
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if (CI->getType() == Type::Int16Ty &&
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AsmPieces.size() == 3 &&
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AsmPieces[0] == "rorw" &&
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AsmPieces[1] == "$$8," &&
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AsmPieces[2] == "${0:w}" &&
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IA->getConstraintString() == "=r,0,~{dirflag},~{fpsr},~{flags},~{cc}") {
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return LowerToBSwap(CI);
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}
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break;
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case 3:
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if (CI->getType() == Type::Int64Ty && Constraints.size() >= 2 &&
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Constraints[0].Codes.size() == 1 && Constraints[0].Codes[0] == "A" &&
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Constraints[1].Codes.size() == 1 && Constraints[1].Codes[0] == "0") {
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// bswap %eax / bswap %edx / xchgl %eax, %edx -> llvm.bswap.i64
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std::vector<std::string> Words;
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SplitString(AsmPieces[0], Words, " \t");
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if (Words.size() == 2 && Words[0] == "bswap" && Words[1] == "%eax") {
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Words.clear();
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SplitString(AsmPieces[1], Words, " \t");
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if (Words.size() == 2 && Words[0] == "bswap" && Words[1] == "%edx") {
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Words.clear();
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SplitString(AsmPieces[2], Words, " \t,");
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if (Words.size() == 3 && Words[0] == "xchgl" && Words[1] == "%eax" &&
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Words[2] == "%edx") {
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return LowerToBSwap(CI);
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}
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}
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}
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}
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break;
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}
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return false;
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}
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/// getConstraintType - Given a constraint letter, return the type of
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/// constraint it is for this target.
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X86TargetLowering::ConstraintType
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@ -420,6 +420,8 @@ namespace llvm {
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SDValue getReturnAddressFrameIndex(SelectionDAG &DAG);
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virtual bool ExpandInlineAsm(CallInst *CI) const;
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ConstraintType getConstraintType(const std::string &Constraint) const;
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std::vector<unsigned>
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