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PR1260:
Add final support to get the QT example to compile. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35290 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -581,6 +581,9 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_mmx_pmulh_w : GCCBuiltin<"__builtin_ia32_pmulhw">,
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Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
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llvm_v4i16_ty], [IntrNoMem]>;
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def int_x86_mmx_pmull_w : GCCBuiltin<"__builtin_ia32_pmullw">,
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Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
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llvm_v4i16_ty], [IntrNoMem]>;
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def int_x86_mmx_pmadd_wd : GCCBuiltin<"__builtin_ia32_pmaddwd">,
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Intrinsic<[llvm_v2i32_ty, llvm_v4i16_ty,
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llvm_v4i16_ty], [IntrNoMem]>;
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@ -590,10 +593,10 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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// Shift left logical
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def int_x86_mmx_psll_w : GCCBuiltin<"__builtin_ia32_psllw">,
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Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
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Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
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llvm_v2i32_ty], [IntrNoMem]>;
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def int_x86_mmx_psll_d : GCCBuiltin<"__builtin_ia32_pslld">,
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Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
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Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
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llvm_v2i32_ty], [IntrNoMem]>;
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def int_x86_mmx_psll_q : GCCBuiltin<"__builtin_ia32_psllq">,
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Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
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@ -610,9 +613,22 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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llvm_v2i32_ty], [IntrNoMem]>;
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def int_x86_mmx_psra_w : GCCBuiltin<"__builtin_ia32_psraw">,
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Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
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llvm_v2i32_ty], [IntrNoMem]>;
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def int_x86_mmx_psra_d : GCCBuiltin<"__builtin_ia32_psrad">,
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Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
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llvm_v2i32_ty], [IntrNoMem]>;
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def int_x86_mmx_psra_d : GCCBuiltin<"__builtin_ia32_psrad">,
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Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
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llvm_v2i32_ty], [IntrNoMem]>;
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}
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// Pack ops.
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_mmx_packsswb : GCCBuiltin<"__builtin_ia32_packsswb">,
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Intrinsic<[llvm_v8i8_ty, llvm_v4i16_ty,
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llvm_v4i16_ty], [IntrNoMem]>;
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def int_x86_mmx_packssdw : GCCBuiltin<"__builtin_ia32_packssdw">,
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Intrinsic<[llvm_v4i16_ty, llvm_v2i32_ty,
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llvm_v2i32_ty], [IntrNoMem]>;
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def int_x86_mmx_packuswb : GCCBuiltin<"__builtin_ia32_packuswb">,
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Intrinsic<[llvm_v8i8_ty, llvm_v4i16_ty,
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llvm_v4i16_ty], [IntrNoMem]>;
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}
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@ -23,7 +23,7 @@
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class MMXI<bits<8> o, Format F, dag ops, string asm, list<dag> pattern>
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: I<o, F, ops, asm, pattern>, TB, Requires<[HasMMX]>;
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class MMX2I<bits<8> o, Format F, dag ops, string asm, list<dag> pattern>
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: I<o, F, ops, asm, pattern>, TB, OpSize, Requires<[HasSSE2]>;
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: I<o, F, ops, asm, pattern>, TB, OpSize, Requires<[HasMMX]>;
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class MMXIi8<bits<8> o, Format F, dag ops, string asm, list<dag> pattern>
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: Ii8<o, F, ops, asm, pattern>, TB, Requires<[HasMMX]>;
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@ -151,7 +151,6 @@ defm MMX_PMULLW : MMXI_binop_rm<0xD5, "pmullw", mul, v4i16, 1>;
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defm MMX_PMULHW : MMXI_binop_rm_int<0xE5, "pmulhw" , int_x86_mmx_pmulh_w , 1>;
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defm MMX_PMADDWD : MMXI_binop_rm_int<0xF5, "pmaddwd", int_x86_mmx_pmadd_wd, 1>;
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// MMX_SHUFFLE_get_shuf_imm xform function: convert vector_shuffle mask to
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// MMX_PSHUF*, MMX_SHUFP* etc. imm.
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def MMX_SHUFFLE_get_shuf_imm : SDNodeXForm<build_vector, [{
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@ -246,6 +245,11 @@ defm MMX_PSRAW : MMXI_binop_rmi_int<0xE1, 0x71, MRM4r, "psraw",
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defm MMX_PSRAD : MMXI_binop_rmi_int<0xE2, 0x72, MRM4r, "psrad",
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int_x86_mmx_psra_d>;
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// Pack instructions
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defm MMX_PACKSSWB : MMXI_binop_rm_int<0x63, "packsswb", int_x86_mmx_packsswb>;
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defm MMX_PACKSSDW : MMXI_binop_rm_int<0x6B, "packssdw", int_x86_mmx_packssdw>;
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defm MMX_PACKUSWB : MMXI_binop_rm_int<0x67, "packuswb", int_x86_mmx_packuswb>;
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// Move Instructions
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def MOVD64rr : MMXI<0x6E, MRMSrcReg, (ops VR64:$dst, GR32:$src),
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"movd {$src, $dst|$dst, $src}", []>;
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