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Change argument order and add explanatory comment to r206130

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Changes requested in code review by Eric Christopher of r206130.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206219 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
David Blaikie 2014-04-14 22:23:06 +00:00
parent 7c34191683
commit b85c7e569a
3 changed files with 13 additions and 10 deletions
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14
lib/Target/X86/X86ISelLowering.cpp
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@ -9636,7 +9636,7 @@ static SDValue LowerVectorAllZeroTest(SDValue Op, const X86Subtarget *Subtarget,
/// Emit nodes that will be selected as "test Op0,Op0", or something
/// equivalent.
SDValue X86TargetLowering::EmitTest(SDLoc dl, SDValue Op, unsigned X86CC,
SDValue X86TargetLowering::EmitTest(SDValue Op, unsigned X86CC, SDLoc dl,
SelectionDAG &DAG) const {
if (Op.getValueType() == MVT::i1)
// KORTEST instruction should be selected
@ -9852,11 +9852,11 @@ SDValue X86TargetLowering::EmitTest(SDLoc dl, SDValue Op, unsigned X86CC,
/// Emit nodes that will be selected as "cmp Op0,Op1", or something
/// equivalent.
SDValue X86TargetLowering::EmitCmp(SDLoc dl, SDValue Op0, SDValue Op1,
unsigned X86CC, SelectionDAG &DAG) const {
SDValue X86TargetLowering::EmitCmp(SDValue Op0, SDValue Op1, unsigned X86CC,
SDLoc dl, SelectionDAG &DAG) const {
if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op1)) {
if (C->getAPIntValue() == 0)
return EmitTest(dl, Op0, X86CC, DAG);
return EmitTest(Op0, X86CC, dl, DAG);
if (Op0.getValueType() == MVT::i1)
llvm_unreachable("Unexpected comparison operation for MVT::i1 operands");
@ -10432,7 +10432,7 @@ SDValue X86TargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const {
if (X86CC == X86::COND_INVALID)
return SDValue();
SDValue EFLAGS = EmitCmp(dl, Op0, Op1, X86CC, DAG);
SDValue EFLAGS = EmitCmp(Op0, Op1, X86CC, dl, DAG);
EFLAGS = ConvertCmpIfNecessary(EFLAGS, DAG);
SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8,
DAG.getConstant(X86CC, MVT::i8), EFLAGS);
@ -10655,7 +10655,7 @@ SDValue X86TargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) const {
if (addTest) {
CC = DAG.getConstant(X86::COND_NE, MVT::i8);
Cond = EmitTest(DL, Cond, X86::COND_NE, DAG);
Cond = EmitTest(Cond, X86::COND_NE, DL, DAG);
}
// a < b ? -1 : 0 -> RES = ~setcc_carry
@ -11076,7 +11076,7 @@ SDValue X86TargetLowering::LowerBRCOND(SDValue Op, SelectionDAG &DAG) const {
if (addTest) {
CC = DAG.getConstant(X86::COND_NE, MVT::i8);
Cond = EmitTest(dl, Cond, X86::COND_NE, DAG);
Cond = EmitTest(Cond, X86::COND_NE, dl, DAG);
}
Cond = ConvertCmpIfNecessary(Cond, DAG);
return DAG.getNode(X86ISD::BRCOND, dl, Op.getValueType(),

4
lib/Target/X86/X86ISelLowering.h
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@ -990,12 +990,12 @@ namespace llvm {
/// Emit nodes that will be selected as "test Op0,Op0", or something
/// equivalent, for use with the given x86 condition code.
SDValue EmitTest(SDLoc dl, SDValue Op0, unsigned X86CC,
SDValue EmitTest(SDValue Op0, unsigned X86CC, SDLoc dl,
SelectionDAG &DAG) const;
/// Emit nodes that will be selected as "cmp Op0,Op1", or something
/// equivalent, for use with the given x86 condition code.
SDValue EmitCmp(SDLoc dl, SDValue Op0, SDValue Op1, unsigned X86CC,
SDValue EmitCmp(SDValue Op0, SDValue Op1, unsigned X86CC, SDLoc dl,
SelectionDAG &DAG) const;
/// Convert a comparison if required by the subtarget.

5
test/DebugInfo/X86/inline-seldag-test.ll
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@ -16,7 +16,10 @@
; CHECK: [[F]]: DW_TAG_subprogram
; CHECK-NEXT: DW_AT_name {{.*}} "f"
; Make sure the condition test is attributed to the inline function
; Make sure the condition test is attributed to the inline function, not the
; location of the test's operands within the caller.
; ASM: # inline-seldag-test.c:2:0
; ASM-NOT: .loc
; ASM: testl