6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-28 06:32:09 +00:00
Code Issues Projects Releases Wiki Activity

Fix coding style violations in 162135 and 162136.

Browse Source 
Patch by Petar Jovanovic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162213 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka 2012-08-20 17:53:24 +00:00
parent 46aed73955
commit b862f094b7
4 changed files with 49 additions and 49 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
View File

@ -307,10 +307,10 @@ void RuntimeDyldELF::resolveARMRelocation(uint8_t *LocalAddress,
}
void RuntimeDyldELF::resolveMIPSRelocation(uint8_t *LocalAddress,
uint32_t FinalAddress,
uint32_t Value,
uint32_t Type,
int32_t Addend) {
uint32_t FinalAddress,
uint32_t Value,
uint32_t Type,
int32_t Addend) {
uint32_t* TargetPtr = (uint32_t*)LocalAddress;
Value += Addend;
@ -367,8 +367,8 @@ void RuntimeDyldELF::resolveRelocation(uint8_t *LocalAddress,
case Triple::mips: // Fall through.
case Triple::mipsel:
resolveMIPSRelocation(LocalAddress, (uint32_t)(FinalAddress & 0xffffffffL),
(uint32_t)(Value & 0xffffffffL), Type,
(uint32_t)(Addend & 0xffffffffL));
(uint32_t)(Value & 0xffffffffL), Type,
(uint32_t)(Addend & 0xffffffffL));
break;
default: llvm_unreachable("Unsupported CPU type!");
}

8
lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.h
View File

@ -43,10 +43,10 @@ protected:
int32_t Addend);
void resolveMIPSRelocation(uint8_t *LocalAddress,
uint32_t FinalAddress,
uint32_t Value,
uint32_t Type,
int32_t Addend);
uint32_t FinalAddress,
uint32_t Value,
uint32_t Type,
int32_t Addend);
virtual void resolveRelocation(uint8_t *LocalAddress,
uint64_t FinalAddress,

76
lib/Target/Mips/MipsELFWriterInfo.cpp
View File

@ -1,4 +1,4 @@
//===-- MipsELFWriterInfo.cpp - ELF Writer Info for the Mips backend --------===//
//===-- MipsELFWriterInfo.cpp - ELF Writer Info for the Mips backend ------===//
//
// The LLVM Compiler Infrastructure
//
@ -27,54 +27,54 @@ using namespace llvm;
MipsELFWriterInfo::MipsELFWriterInfo(bool is64Bit_, bool isLittleEndian_)
: TargetELFWriterInfo(is64Bit_, isLittleEndian_) {
EMachine = EM_MIPS;
}
EMachine = EM_MIPS;
}
MipsELFWriterInfo::~MipsELFWriterInfo() {}
unsigned MipsELFWriterInfo::getRelocationType(unsigned MachineRelTy) const {
switch(MachineRelTy) {
case Mips::reloc_mips_pc16:
return ELF::R_MIPS_GOT16;
case Mips::reloc_mips_hi:
return ELF::R_MIPS_HI16;
case Mips::reloc_mips_lo:
return ELF::R_MIPS_LO16;
case Mips::reloc_mips_26:
return ELF::R_MIPS_26;
default:
llvm_unreachable("unknown Mips machine relocation type");
}
switch(MachineRelTy) {
case Mips::reloc_mips_pc16:
return ELF::R_MIPS_GOT16;
case Mips::reloc_mips_hi:
return ELF::R_MIPS_HI16;
case Mips::reloc_mips_lo:
return ELF::R_MIPS_LO16;
case Mips::reloc_mips_26:
return ELF::R_MIPS_26;
default:
llvm_unreachable("unknown Mips machine relocation type");
}
}
long int MipsELFWriterInfo::getDefaultAddendForRelTy(unsigned RelTy,
long int Modifier) const {
switch(RelTy) {
case ELF::R_MIPS_26: return Modifier;
default:
llvm_unreachable("unknown Mips relocation type");
}
long int Modifier) const {
switch(RelTy) {
case ELF::R_MIPS_26: return Modifier;
default:
llvm_unreachable("unknown Mips relocation type");
}
}
unsigned MipsELFWriterInfo::getRelocationTySize(unsigned RelTy) const {
switch(RelTy) {
case ELF::R_MIPS_GOT16:
case ELF::R_MIPS_26:
return 32;
default:
llvm_unreachable("unknown Mips relocation type");
}
switch(RelTy) {
case ELF::R_MIPS_GOT16:
case ELF::R_MIPS_26:
return 32;
default:
llvm_unreachable("unknown Mips relocation type");
}
}
bool MipsELFWriterInfo::isPCRelativeRel(unsigned RelTy) const {
switch(RelTy) {
case ELF::R_MIPS_GOT16:
return true;
case ELF::R_MIPS_26:
return false;
default:
llvm_unreachable("unknown Mips relocation type");
}
switch(RelTy) {
case ELF::R_MIPS_GOT16:
return true;
case ELF::R_MIPS_26:
return false;
default:
llvm_unreachable("unknown Mips relocation type");
}
}
unsigned MipsELFWriterInfo::getAbsoluteLabelMachineRelTy() const {
@ -82,8 +82,8 @@ unsigned MipsELFWriterInfo::getAbsoluteLabelMachineRelTy() const {
}
long int MipsELFWriterInfo::computeRelocation(unsigned SymOffset,
unsigned RelOffset,
unsigned RelTy) const {
unsigned RelOffset,
unsigned RelTy) const {
if (RelTy == ELF::R_MIPS_GOT16)
return SymOffset - (RelOffset + 4);

2
lib/Target/Mips/MipsTargetMachine.h
View File

@ -72,7 +72,7 @@ public:
}
virtual const MipsELFWriterInfo *getELFWriterInfo() const {
return &ELFWriterInfo;
return &ELFWriterInfo;
}
// Pass Pipeline Configuration