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Pull the UsedInInstr.test() calls into calcSpillCost() and remember aliases.

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This fixes the miscompilations of MultiSource/Applications/JM/l{en,de}cod.
Clang now successfully self hosts in a debug build with the fast register allocator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103975 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2010-05-17 21:02:08 +00:00
parent 423c9e3e58
commit b8acb7be80
1 changed files with 5 additions and 5 deletions
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10
lib/CodeGen/RegAllocFast.cpp
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@ -381,6 +381,8 @@ void RAFast::definePhysReg(MachineInstr *MI, unsigned PhysReg,
// can be allocated directly. // can be allocated directly.
// Returns spillImpossible when PhysReg or an alias can't be spilled. // Returns spillImpossible when PhysReg or an alias can't be spilled.
unsigned RAFast::calcSpillCost(unsigned PhysReg) const { unsigned RAFast::calcSpillCost(unsigned PhysReg) const {
if (UsedInInstr.test(PhysReg))
return spillImpossible;
switch (unsigned VirtReg = PhysRegState[PhysReg]) { switch (unsigned VirtReg = PhysRegState[PhysReg]) {
case regDisabled: case regDisabled:
break; break;
@ -396,6 +398,8 @@ unsigned RAFast::calcSpillCost(unsigned PhysReg) const {
unsigned Cost = 0; unsigned Cost = 0;
for (const unsigned *AS = TRI->getAliasSet(PhysReg); for (const unsigned *AS = TRI->getAliasSet(PhysReg);
unsigned Alias = *AS; ++AS) { unsigned Alias = *AS; ++AS) {
if (UsedInInstr.test(Alias))
return spillImpossible;
switch (unsigned VirtReg = PhysRegState[Alias]) { switch (unsigned VirtReg = PhysRegState[Alias]) {
case regDisabled: case regDisabled:
break; break;
@ -436,14 +440,11 @@ void RAFast::allocVirtReg(MachineInstr *MI, LiveRegEntry &LRE, unsigned Hint) {
// Ignore invalid hints. // Ignore invalid hints.
if (Hint && (!TargetRegisterInfo::isPhysicalRegister(Hint) || if (Hint && (!TargetRegisterInfo::isPhysicalRegister(Hint) ||
!RC->contains(Hint) || UsedInInstr.test(Hint) || !RC->contains(Hint) || !Allocatable.test(Hint)))
!Allocatable.test(Hint)))
Hint = 0; Hint = 0;
// Take hint when possible. // Take hint when possible.
if (Hint) { if (Hint) {
assert(RC->contains(Hint) && !UsedInInstr.test(Hint) &&
Allocatable.test(Hint) && "Invalid hint should have been cleared");
switch(calcSpillCost(Hint)) { switch(calcSpillCost(Hint)) {
default: default:
definePhysReg(MI, Hint, regFree); definePhysReg(MI, Hint, regFree);
@ -470,7 +471,6 @@ void RAFast::allocVirtReg(MachineInstr *MI, LiveRegEntry &LRE, unsigned Hint) {
unsigned BestReg = 0, BestCost = spillImpossible; unsigned BestReg = 0, BestCost = spillImpossible;
for (TargetRegisterClass::iterator I = AOB; I != AOE; ++I) { for (TargetRegisterClass::iterator I = AOB; I != AOE; ++I) {
if (UsedInInstr.test(*I)) continue;
unsigned Cost = calcSpillCost(*I); unsigned Cost = calcSpillCost(*I);
// Cost is 0 when all aliases are already disabled. // Cost is 0 when all aliases are already disabled.
if (Cost == 0) if (Cost == 0)