mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-17 05:29:24 +00:00
Increase ISD::ParamFlags to 64 bits. Increase the ByValSize
field to 32 bits, thus enabling correct handling of ByVal structs bigger than 0x1ffff. Abstract interface a bit. Fixes gcc.c-torture/execute/pr23135.c and gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing on ppc32, quietly producing wrong code on x86-32.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48122 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -17,6 +17,7 @@
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/ValueTypes.h"
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#include "llvm/CodeGen/SelectionDAGNodes.h"
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namespace llvm {
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class TargetRegisterInfo;
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@ -97,7 +98,7 @@ public:
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/// reflect the change.
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typedef bool CCAssignFn(unsigned ValNo, MVT::ValueType ValVT,
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MVT::ValueType LocVT, CCValAssign::LocInfo LocInfo,
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unsigned ArgFlags, CCState &State);
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ISD::ParamFlags::ParamFlagsTy ArgFlags, CCState &State);
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/// CCState - This class holds information needed while lowering arguments and
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@ -196,7 +197,8 @@ public:
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// parameter attribute.
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void HandleByVal(unsigned ValNo, MVT::ValueType ValVT,
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MVT::ValueType LocVT, CCValAssign::LocInfo LocInfo,
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int MinSize, int MinAlign, unsigned ArgFlags);
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int MinSize, int MinAlign,
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ISD::ParamFlags::ParamFlagsTy ArgFlags);
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private:
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/// MarkAllocated - Mark a register and all of its aliases as allocated.
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@ -57,27 +57,29 @@ struct SDVTList {
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///
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namespace ISD {
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namespace ParamFlags {
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enum Flags {
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NoFlagSet = 0,
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ZExt = 1<<0, ///< Parameter should be zero extended
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ZExtOffs = 0,
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SExt = 1<<1, ///< Parameter should be sign extended
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SExtOffs = 1,
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InReg = 1<<2, ///< Parameter should be passed in register
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InRegOffs = 2,
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StructReturn = 1<<3, ///< Hidden struct-return pointer
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StructReturnOffs = 3,
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ByVal = 1<<4, ///< Struct passed by value
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ByValOffs = 4,
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Nest = 1<<5, ///< Parameter is nested function static chain
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NestOffs = 5,
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ByValAlign = 0xF << 6, //< The alignment of the struct
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ByValAlignOffs = 6,
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ByValSize = 0x1ffff << 10, //< The size of the struct
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ByValSizeOffs = 10,
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OrigAlignment = 0x1F<<27,
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OrigAlignmentOffs = 27
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};
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typedef unsigned long long ParamFlagsTy;
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const ParamFlagsTy NoFlagSet = 0ULL;
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const ParamFlagsTy ZExt = 1ULL<<0; ///< Zero extended
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const ParamFlagsTy ZExtOffs = 0;
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const ParamFlagsTy SExt = 1ULL<<1; ///< Sign extended
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const ParamFlagsTy SExtOffs = 1;
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const ParamFlagsTy InReg = 1ULL<<2; ///< Passed in register
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const ParamFlagsTy InRegOffs = 2;
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const ParamFlagsTy StructReturn = 1ULL<<3; ///< Hidden struct-ret ptr
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const ParamFlagsTy StructReturnOffs = 3;
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const ParamFlagsTy ByVal = 1ULL<<4; ///< Struct passed by value
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const ParamFlagsTy ByValOffs = 4;
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const ParamFlagsTy Nest = 1ULL<<5; ///< Nested fn static chain
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const ParamFlagsTy NestOffs = 5;
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const ParamFlagsTy ByValAlign = 0xFULL << 6; //< Struct alignment
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const ParamFlagsTy ByValAlignOffs = 6;
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const ParamFlagsTy OrigAlignment = 0x1FULL<<27;
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const ParamFlagsTy OrigAlignmentOffs = 27;
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const ParamFlagsTy ByValSize = 0xffffffffULL << 32; //< Struct size
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const ParamFlagsTy ByValSizeOffs = 32;
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const ParamFlagsTy One = 1LL; //< 1 of this type, for shifts
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}
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//===--------------------------------------------------------------------===//
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@ -35,7 +35,7 @@ CCState::CCState(unsigned CC, bool isVarArg, const TargetMachine &tm,
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void CCState::HandleByVal(unsigned ValNo, MVT::ValueType ValVT,
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MVT::ValueType LocVT, CCValAssign::LocInfo LocInfo,
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int MinSize, int MinAlign,
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unsigned ArgFlags) {
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ISD::ParamFlags::ParamFlagsTy ArgFlags) {
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unsigned Align = 1 << ((ArgFlags & ISD::ParamFlags::ByValAlign) >>
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ISD::ParamFlags::ByValAlignOffs);
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unsigned Size = (ArgFlags & ISD::ParamFlags::ByValSize) >>
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@ -66,7 +66,8 @@ void CCState::AnalyzeFormalArguments(SDNode *TheArgs, CCAssignFn Fn) {
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for (unsigned i = 0; i != NumArgs; ++i) {
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MVT::ValueType ArgVT = TheArgs->getValueType(i);
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SDOperand FlagOp = TheArgs->getOperand(3+i);
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unsigned ArgFlags = cast<ConstantSDNode>(FlagOp)->getValue();
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ISD::ParamFlags::ParamFlagsTy ArgFlags =
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cast<ConstantSDNode>(FlagOp)->getValue();
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if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
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cerr << "Formal argument #" << i << " has unhandled type "
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<< MVT::getValueTypeString(ArgVT) << "\n";
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@ -98,7 +99,8 @@ void CCState::AnalyzeCallOperands(SDNode *TheCall, CCAssignFn Fn) {
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for (unsigned i = 0; i != NumOps; ++i) {
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MVT::ValueType ArgVT = TheCall->getOperand(5+2*i).getValueType();
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SDOperand FlagOp = TheCall->getOperand(5+2*i+1);
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unsigned ArgFlags =cast<ConstantSDNode>(FlagOp)->getValue();
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ISD::ParamFlags::ParamFlagsTy ArgFlags =
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cast<ConstantSDNode>(FlagOp)->getValue();
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if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
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cerr << "Call operand #" << i << " has unhandled type "
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<< MVT::getValueTypeString(ArgVT) << "\n";
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@ -4059,7 +4059,7 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
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for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end();
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I != E; ++I, ++j) {
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MVT::ValueType VT = getValueType(I->getType());
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unsigned Flags = ISD::ParamFlags::NoFlagSet;
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ISD::ParamFlags::ParamFlagsTy Flags = ISD::ParamFlags::NoFlagSet;
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unsigned OriginalAlignment =
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getTargetData()->getABITypeAlignment(I->getType());
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@ -4083,12 +4083,15 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
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// this info is not there but there are cases it cannot get right.
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if (F.getParamAlignment(j))
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FrameAlign = Log2_32(F.getParamAlignment(j));
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Flags |= (FrameAlign << ISD::ParamFlags::ByValAlignOffs);
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Flags |= (FrameSize << ISD::ParamFlags::ByValSizeOffs);
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Flags |= ((ISD::ParamFlags::ParamFlagsTy)FrameAlign
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<< ISD::ParamFlags::ByValAlignOffs);
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Flags |= ((ISD::ParamFlags::ParamFlagsTy)FrameSize
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<< ISD::ParamFlags::ByValSizeOffs);
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}
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if (F.paramHasAttr(j, ParamAttr::Nest))
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Flags |= ISD::ParamFlags::Nest;
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Flags |= (OriginalAlignment << ISD::ParamFlags::OrigAlignmentOffs);
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Flags |= ((ISD::ParamFlags::ParamFlagsTy)OriginalAlignment
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<< ISD::ParamFlags::OrigAlignmentOffs);
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MVT::ValueType RegisterVT = getRegisterType(VT);
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unsigned NumRegs = getNumRegisters(VT);
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@ -4097,8 +4100,8 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
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// if it isn't first piece, alignment must be 1
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if (i > 0)
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Flags = (Flags & (~ISD::ParamFlags::OrigAlignment)) |
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(1 << ISD::ParamFlags::OrigAlignmentOffs);
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Ops.push_back(DAG.getConstant(Flags, MVT::i32));
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(ISD::ParamFlags::One << ISD::ParamFlags::OrigAlignmentOffs);
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Ops.push_back(DAG.getConstant(Flags, MVT::i64));
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}
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}
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@ -4174,7 +4177,7 @@ TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
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for (unsigned i = 0, e = Args.size(); i != e; ++i) {
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MVT::ValueType VT = getValueType(Args[i].Ty);
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SDOperand Op = Args[i].Node;
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unsigned Flags = ISD::ParamFlags::NoFlagSet;
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ISD::ParamFlags::ParamFlagsTy Flags = ISD::ParamFlags::NoFlagSet;
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unsigned OriginalAlignment =
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getTargetData()->getABITypeAlignment(Args[i].Ty);
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@ -4196,12 +4199,15 @@ TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
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// info is not there but there are cases it cannot get right.
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if (Args[i].Alignment)
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FrameAlign = Log2_32(Args[i].Alignment);
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Flags |= (FrameAlign << ISD::ParamFlags::ByValAlignOffs);
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Flags |= (FrameSize << ISD::ParamFlags::ByValSizeOffs);
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Flags |= ((ISD::ParamFlags::ParamFlagsTy)FrameAlign
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<< ISD::ParamFlags::ByValAlignOffs);
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Flags |= ((ISD::ParamFlags::ParamFlagsTy)FrameSize
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<< ISD::ParamFlags::ByValSizeOffs);
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}
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if (Args[i].isNest)
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Flags |= ISD::ParamFlags::Nest;
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Flags |= OriginalAlignment << ISD::ParamFlags::OrigAlignmentOffs;
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Flags |= ((ISD::ParamFlags::ParamFlagsTy)OriginalAlignment)
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<< ISD::ParamFlags::OrigAlignmentOffs;
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MVT::ValueType PartVT = getRegisterType(VT);
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unsigned NumParts = getNumRegisters(VT);
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@ -4217,13 +4223,13 @@ TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
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for (unsigned i = 0; i != NumParts; ++i) {
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// if it isn't first piece, alignment must be 1
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unsigned MyFlags = Flags;
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ISD::ParamFlags::ParamFlagsTy MyFlags = Flags;
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if (i != 0)
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MyFlags = (MyFlags & (~ISD::ParamFlags::OrigAlignment)) |
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(1 << ISD::ParamFlags::OrigAlignmentOffs);
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(ISD::ParamFlags::One << ISD::ParamFlags::OrigAlignmentOffs);
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Ops.push_back(Parts[i]);
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Ops.push_back(DAG.getConstant(MyFlags, MVT::i32));
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Ops.push_back(DAG.getConstant(MyFlags, MVT::i64));
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}
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}
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@ -368,12 +368,13 @@ static void
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HowToPassArgument(MVT::ValueType ObjectVT, unsigned NumGPRs,
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unsigned StackOffset, unsigned &NeededGPRs,
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unsigned &NeededStackSize, unsigned &GPRPad,
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unsigned &StackPad, unsigned Flags) {
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unsigned &StackPad, ISD::ParamFlags::ParamFlagsTy Flags) {
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NeededStackSize = 0;
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NeededGPRs = 0;
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StackPad = 0;
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GPRPad = 0;
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unsigned align = (Flags >> ISD::ParamFlags::OrigAlignmentOffs);
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unsigned align = ((Flags & ISD::ParamFlags::OrigAlignment)
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>> ISD::ParamFlags::OrigAlignmentOffs);
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GPRPad = NumGPRs % ((align + 3)/4);
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StackPad = StackOffset % align;
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unsigned firstGPR = NumGPRs + GPRPad;
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@ -422,7 +423,7 @@ SDOperand ARMTargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG) {
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unsigned StackPad;
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unsigned GPRPad;
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MVT::ValueType ObjectVT = Op.getOperand(5+2*i).getValueType();
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unsigned Flags = Op.getConstantOperandVal(5+2*i+1);
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ISD::ParamFlags::ParamFlagsTy Flags = Op.getConstantOperandVal(5+2*i+1);
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HowToPassArgument(ObjectVT, NumGPRs, NumBytes, ObjGPRs, ObjSize,
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GPRPad, StackPad, Flags);
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NumBytes += ObjSize + StackPad;
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@ -445,7 +446,7 @@ SDOperand ARMTargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG) {
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std::vector<SDOperand> MemOpChains;
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for (unsigned i = 0; i != NumOps; ++i) {
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SDOperand Arg = Op.getOperand(5+2*i);
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unsigned Flags = Op.getConstantOperandVal(5+2*i+1);
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ISD::ParamFlags::ParamFlagsTy Flags = Op.getConstantOperandVal(5+2*i+1);
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MVT::ValueType ArgVT = Arg.getValueType();
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unsigned ObjSize;
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@ -924,7 +925,7 @@ static SDOperand LowerFORMAL_ARGUMENT(SDOperand Op, SelectionDAG &DAG,
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unsigned ObjGPRs;
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unsigned GPRPad;
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unsigned StackPad;
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unsigned Flags = Op.getConstantOperandVal(ArgNo + 3);
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ISD::ParamFlags::ParamFlagsTy Flags = Op.getConstantOperandVal(ArgNo + 3);
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HowToPassArgument(ObjectVT, NumGPRs, ArgOffset, ObjGPRs,
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ObjSize, GPRPad, StackPad, Flags);
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NumGPRs += GPRPad;
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@ -1361,8 +1361,10 @@ PPCTargetLowering::LowerFORMAL_ARGUMENTS(SDOperand Op,
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MVT::ValueType ObjectVT = Op.getValue(ArgNo).getValueType();
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unsigned ObjSize = MVT::getSizeInBits(ObjectVT)/8;
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unsigned ArgSize = ObjSize;
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unsigned Flags = cast<ConstantSDNode>(Op.getOperand(ArgNo+3))->getValue();
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unsigned AlignFlag = 1 << ISD::ParamFlags::OrigAlignmentOffs;
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ISD::ParamFlags::ParamFlagsTy Flags =
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cast<ConstantSDNode>(Op.getOperand(ArgNo+3))->getValue();
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unsigned AlignFlag = ISD::ParamFlags::One
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<< ISD::ParamFlags::OrigAlignmentOffs;
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unsigned isByVal = Flags & ISD::ParamFlags::ByVal;
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// See if next argument requires stack alignment in ELF
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bool Expand = (ObjectVT == MVT::f64) || ((ArgNo + 1 < e) &&
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@ -1659,8 +1661,9 @@ static SDNode *isBLACompatibleAddress(SDOperand Op, SelectionDAG &DAG) {
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/// does not fit in registers.
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static SDOperand
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CreateCopyOfByValArgument(SDOperand Src, SDOperand Dst, SDOperand Chain,
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unsigned Flags, SelectionDAG &DAG, unsigned Size) {
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unsigned Align = 1 <<
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ISD::ParamFlags::ParamFlagsTy Flags,
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SelectionDAG &DAG, unsigned Size) {
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unsigned Align = ISD::ParamFlags::One <<
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((Flags & ISD::ParamFlags::ByValAlign) >> ISD::ParamFlags::ByValAlignOffs);
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SDOperand AlignNode = DAG.getConstant(Align, MVT::i32);
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SDOperand SizeNode = DAG.getConstant(Size, MVT::i32);
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@ -1693,7 +1696,8 @@ SDOperand PPCTargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG,
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// Add up all the space actually used.
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for (unsigned i = 0; i != NumOps; ++i) {
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unsigned Flags = cast<ConstantSDNode>(Op.getOperand(5+2*i+1))->getValue();
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ISD::ParamFlags::ParamFlagsTy Flags =
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cast<ConstantSDNode>(Op.getOperand(5+2*i+1))->getValue();
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unsigned ArgSize =MVT::getSizeInBits(Op.getOperand(5+2*i).getValueType())/8;
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if (Flags & ISD::ParamFlags::ByVal)
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ArgSize = (Flags & ISD::ParamFlags::ByValSize) >>
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@ -1757,8 +1761,10 @@ SDOperand PPCTargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG,
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for (unsigned i = 0; i != NumOps; ++i) {
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bool inMem = false;
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SDOperand Arg = Op.getOperand(5+2*i);
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unsigned Flags = cast<ConstantSDNode>(Op.getOperand(5+2*i+1))->getValue();
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unsigned AlignFlag = 1 << ISD::ParamFlags::OrigAlignmentOffs;
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ISD::ParamFlags::ParamFlagsTy Flags =
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cast<ConstantSDNode>(Op.getOperand(5+2*i+1))->getValue();
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unsigned AlignFlag = ISD::ParamFlags::One <<
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ISD::ParamFlags::OrigAlignmentOffs;
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// See if next argument requires stack alignment in ELF
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unsigned next = 5+2*(i+1)+1;
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bool Expand = (Arg.getValueType() == MVT::f64) || ((i + 1 < NumOps) &&
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@ -1145,8 +1145,9 @@ CopyTailCallClobberedArgumentsToVRegs(SDOperand Chain,
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/// parameter.
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static SDOperand
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CreateCopyOfByValArgument(SDOperand Src, SDOperand Dst, SDOperand Chain,
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unsigned Flags, SelectionDAG &DAG) {
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unsigned Align = 1 <<
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ISD::ParamFlags::ParamFlagsTy Flags,
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SelectionDAG &DAG) {
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unsigned Align = ISD::ParamFlags::One <<
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((Flags & ISD::ParamFlags::ByValAlign) >> ISD::ParamFlags::ByValAlignOffs);
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unsigned Size = (Flags & ISD::ParamFlags::ByValSize) >>
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ISD::ParamFlags::ByValSizeOffs;
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@ -1162,7 +1163,8 @@ SDOperand X86TargetLowering::LowerMemArgument(SDOperand Op, SelectionDAG &DAG,
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unsigned CC,
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SDOperand Root, unsigned i) {
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// Create the nodes corresponding to a load from this parameter slot.
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unsigned Flags = cast<ConstantSDNode>(Op.getOperand(3 + i))->getValue();
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ISD::ParamFlags::ParamFlagsTy Flags =
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cast<ConstantSDNode>(Op.getOperand(3 + i))->getValue();
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bool AlwaysUseMutable = (CC==CallingConv::Fast) && PerformTailCallOpt;
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bool isByVal = Flags & ISD::ParamFlags::ByVal;
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bool isImmutable = !AlwaysUseMutable && !isByVal;
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@ -1380,7 +1382,8 @@ X86TargetLowering::LowerMemOpCallTo(SDOperand Op, SelectionDAG &DAG,
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SDOperand PtrOff = DAG.getIntPtrConstant(LocMemOffset);
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PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff);
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SDOperand FlagsOp = Op.getOperand(6+2*VA.getValNo());
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unsigned Flags = cast<ConstantSDNode>(FlagsOp)->getValue();
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ISD::ParamFlags::ParamFlagsTy Flags =
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cast<ConstantSDNode>(FlagsOp)->getValue();
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if (Flags & ISD::ParamFlags::ByVal) {
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return CreateCopyOfByValArgument(Arg, PtrOff, Chain, Flags, DAG);
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}
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@ -1642,7 +1645,8 @@ SDOperand X86TargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG) {
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assert(VA.isMemLoc());
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SDOperand Arg = Op.getOperand(5+2*VA.getValNo());
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SDOperand FlagsOp = Op.getOperand(6+2*VA.getValNo());
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unsigned Flags = cast<ConstantSDNode>(FlagsOp)->getValue();
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ISD::ParamFlags::ParamFlagsTy Flags =
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cast<ConstantSDNode>(FlagsOp)->getValue();
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// Create frame index.
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int32_t Offset = VA.getLocMemOffset()+FPDiff;
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uint32_t OpSize = (MVT::getSizeInBits(VA.getLocVT())+7)/8;
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@ -30,7 +30,7 @@ void CallingConvEmitter::run(std::ostream &O) {
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<< std::string(CCs[i]->getName().size()+13, ' ')
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<< "MVT::ValueType LocVT, CCValAssign::LocInfo LocInfo,\n"
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<< std::string(CCs[i]->getName().size()+13, ' ')
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<< "unsigned ArgFlags, CCState &State);\n";
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<< "ISD::ParamFlags::ParamFlagsTy ArgFlags, CCState &State);\n";
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}
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// Emit each calling convention description in full.
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@ -48,7 +48,7 @@ void CallingConvEmitter::EmitCallingConv(Record *CC, std::ostream &O) {
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<< std::string(CC->getName().size()+13, ' ')
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<< "MVT::ValueType LocVT, CCValAssign::LocInfo LocInfo,\n"
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<< std::string(CC->getName().size()+13, ' ')
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<< "unsigned ArgFlags, CCState &State) {\n";
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<< "ISD::ParamFlags::ParamFlagsTy ArgFlags, CCState &State) {\n";
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// Emit all of the actions, in order.
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for (unsigned i = 0, e = CCActions->getSize(); i != e; ++i) {
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O << "\n";
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Reference in New Issue
Block a user