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fix yet more regressions

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24308 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Lenharth 2005-11-11 23:08:46 +00:00
parent 2729e614fa
commit b921f1b731
1 changed files with 1 additions and 1 deletions
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lib/Target/Alpha/AlphaISelPattern.cpp
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@ -1530,7 +1530,7 @@ unsigned AlphaISel::SelectExpr(SDOperand N) {
N.getOperand(0).getValueType() == MVT::f64 && N.getOperand(0).getValueType() == MVT::f64 &&
"only f64 to f32 conversion supported here"); "only f64 to f32 conversion supported here");
Tmp1 = SelectExpr(N.getOperand(0)); Tmp1 = SelectExpr(N.getOperand(0));
BuildMI(BB, Alpha::CVTTS, 1, Result).addReg(Alpha::F31).addReg(Tmp1); BuildMI(BB, Alpha::CVTTS, 1, Result).addReg(Tmp1);
return Result; return Result;
case ISD::FP_EXTEND: case ISD::FP_EXTEND: